Hitachi, Ltd.

Renesas Electronics Corporation

Fujifilm Healthcare Corporation

Renesas Technology Corp.

Masafumi Onouchi

Takafumi Ishitsu

Yusuke Kanno

Hiroyuki Mizuno

Makoto Saen

Fumito Watanabe

Shigenobu Komatsu

Koichiro Ishibashi

Kazumasa Yanagisawa

Tetsuya Yamada

Yasuhisa Shimazaki

Sadayuki Morita

Kazuo Otsuga

Yasuto Igarashi

Tatsuhiko Hayashi

There is provided a radiographic imaging apparatus capable of alignment of a detector with a collimator with a position of a radiation source fixed. The radiographic imaging apparatus includes the radiation source which irradiates a subject with radioactive rays, a plurality of detecting elements which detect photons in the radioactive rays, and a collimator which is disposed between the radiation source and the detecting elements and has a plurality of walls which form a plurality of passing holes that the radioactive rays pass. The detecting element and the collimator are aligned with each other in a direction which is orthogonal to a direction that the subject is irradiated with the radioactive rays such that a ratio or a difference between output signals from the detecting elements which are mutually adjacent with the wall being interposed falls within a predetermined range.

Radiographic imaging apparatus

There are provided a radiation detector module, a radiation detector, and a radiographic imaging apparatus which make it possible to increase the row number while suppressing a length in a body-axis direction. The radiation detector module includes a detector substrate on which a scintillator, a photodiode, and AD conversion chips are loaded, and a control substrate which supplies power to the detector substrate and controls the operation of an AD conversion unit (AFE) of each AD conversion chip of the detector substrate. The plurality of radiation detector modules configure a radiation detector which suppresses the length in the body-axis direction by connecting together the two substrates so as to form a two-stage structure by stacking connectors.

Radiation detector module, radiation detector, and radiographic imaging apparatus

The present invention provides a radiation imaging apparatus capable of maintaining the quality of an image obtained even when a dose incident on a radiation detector changes suddenly. The present invention is a radiation imaging apparatus including a radiation source, a radiation detector to detect radiation emitted from the radiation source, and a cooling unit to cool the radiation detector; and is characterized in that the radiation detector has a counting circuit to output a number of photons in radiation counted per unit time as a photon counting rate, and the cooling unit controls a coolability of the radiation detector in response to the photon counting rate.

Radiation imaging apparatus

It is possible to reduce the weight of an anti-scatter collimator and to improve uniformity of scattered radiation shielding rate. A radiation imaging device has a radiation source, a radiation detector that detects radiation emitted from a focus of the radiation source, and an anti-scatter collimator provided between the radiation source and the radiation detector. The anti-scatter collimator has a septum provided at a predetermined interval along a radiation incident direction on a boundary between pixels of the radiation detector. The upper end of a top septum corresponds with a radiation incident surface.

Radiation imaging device

To provide a radiation imaging system which is adapted to downsize a photon counting radiation detector including a semiconductor layer for detecting photons of radiation and a collimator for suppressing incidence of scattered rays, and which ensures high voltage resistance. The radiation imaging system includes: a radiation source; a radiation detector; and a support portion for supporting the radiation source and the radiation detector in opposed relation. The system has a structure wherein the radiation detector includes a plurality of detecting element modules arranged in an arcuate form. The detecting element module includes a base fixed to the support portion; a semiconductor layer; a high-voltage wire for supplying high voltage to the semiconductor layer; a collimator for suppressing scattered rays, and a supporting column disposed at place within a predetermined distance from the semiconductor layer.

Radiation imaging system

Provided is a radiographic imaging apparatus including a photon-counting detector that prevents variation in count rate performance by using self-heating of a photon-counting circuit, and improves accuracy in detecting photons. The photon-counting detector is provided with a semiconductor layer configured to generate electrical charge upon receipt of photons of radiation, a photon-counting circuit configured to read current values from pixel electrodes formed on one of the semiconductor surfaces, and a heat amount compensator configured to control an amount of heat of the photon-counting circuit according to a count rate of the photon-counting circuit. The heat amount compensator is activated when the count rate is low so that the amount of heat delivered from the photon-counting circuit when the count is low becomes nearly equal to the amount of heat delivered from the photon-counting circuit when the count rate is high.

There is provided a configuration that allows implementation of both photon measurement and current measurement with practical measuring performance and circuit area, where a plurality of detector elements constituting one detector pixel are connected to photon measuring circuits on a one-to-one basis, thereby counting current pulse signals outputted from the detector elements, and a current measuring unit incorporates an integrator, an adder, and a sample-hold circuit provided for every detector pixel, and a converter for converting analogue signals to digital signals, one converter being provided for a plurality of detector pixels. The integrator integrates and the adder adds current pulse signals respectively outputted from the plurality of detector elements constituting one detector pixel, the sample-hold circuit integrates outputs from the adder, and the converter selectively converts analogue outputs from the integration circuit of any of the plurality of detector pixels.

Radiation detecting device and medical imaging device

In order to provide a highly precise analog/digital conversion system in which an output error of an AD converter is small, sampling is performed at a certain sampling period S from the start time of a measurement period TL to the (N&#x2212;1)-th sampling when the measurement period TL does not correspond to the sampling period S multiplied by the number of samplings N, the N-th sampling is performed at a timing when a time interval between the (N&#x2212;1)-th sampling and the N-th sampling is equal to the sampling period S multiplied by a predetermined coefficient k, and the k value is set to a non-integer optimum value evaluated in advance in accordance with the N value in order to minimize an error of the detection value of the AD converter.

Analog/digital conversion system, X-ray CT apparatus, and medical image imaging apparatus

A semiconductor integrated circuit includes a plurality of output transistors each controlling the magnitude of an output voltage relative to the magnitude of a load current according to a control value indicated by an impedance control signal applied to a control terminal, a voltage monitor circuit outputting an output voltage monitor value indicating a voltage value of the output voltage, and a control circuit controlling the magnitude of the control value according to the magnitude of an error value between a reference voltage indicating a target value of the output voltage and the output voltage monitor value, and controls based on the control value whether any of such transistors be brought to a conducting state. The control circuit increases a change step of the control value relative to the error value during a predetermined period according to prenotification signals for notifying a change of the load current in advance.

Semiconductor integrated circuit

There is a need to ensure operation performance of a circuit region under DVFS control at low costs and highly precisely while a power-supply voltage change is made to the region. A first circuit (FVA) uses a first power-supply voltage (VDDA) for operation. A second circuit (NFVA) uses a second power-supply voltage (VDDB) for operation. A clock delay may be adjusted between paths for transmitting a clock to these circuits. When VDDA equals VDDB, a clock is distributed to FVA through a path that does not contain a delay device for phase adjustment. When the power-supply voltage for the FVA region is reduced, a clock is distributed to the FVA region based on a phase equivalent to one or two cycles of the clock displaced. Synchronization control is provided to synchronize clocks (CKAF and CKBF) and ensures operation so that a phase of two clocks to be compared fits in a range of design values while the power-supply voltage for the first circuit is changed.

Semiconductor integrated circuit and control method for clock signal synchronization

In a configuration provided with, for example, sixty four pieces of processor cores, an on-chip-memory, a bus commonly connected thereto, and others, the processor cores are operated by a power supply with low voltage and a clock with low frequency, and the bus is operated by a power supply with high voltage and a clock with high frequency. Each of the processor cores is provided with a bus interface and a frequency divider in order to absorb a power supply voltage difference and a frequency difference between the bus and each of them. The frequency divider generates the clock with low frequency from the clock with high frequency, and the bus interface is provided with a level shifting function, a data width converting function, a hand shaking function between the bus and the bus interface, and the like.

Information processing device

A low power consumption in a semiconductor integrated circuit device can be achieved by reducing a glitch power in a flip-flop. In a pulse-generator-incorporated auto-clock-gating flip-flop in which data latch is performed by using a pulsed clock, input data is latched based on an output of a dynamic XOR circuit, which is a comparator circuit, during a period when the pulsed clock is at a high level, and the dynamic XOR circuit is cut off during a period when the pulsed clock is at a low level.

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Tokyo, Japan

Masafumi Onouchi