Hitachi, Ltd.

Masafumi Kazumi

Toshinori Murata

Yuji Ito

Ikuya Arai

Tomomitsu Kuroyanagi

A D/A converter comprises one or both of a first D/A converter and a second D/A converter. In the first D/A converter, n (n.gtoreq.2) semiconductor devices are connected in parallel to each other between a power supply and a load resistor, gates of (n-1) semiconductor devices (called a first group of semiconductor devices) of the n semiconductor devices are connected to a common gate bias potential source, those semiconductor devices of the first group of semiconductor devices which are equal in number to the number determined by a content of high order bits of an input digital data are turned on to supply a current to the load resistor, and a voltage drop across the load resistor is outputted as an analog quantity representing the high order bits. In the second D/A converter, a gate voltage determined by a content of low order bits of the input digital data is supplied to a gate of the remaining one (called a second semiconductor device) of the n semiconductor device to supply a current to the load resistor, and a voltage drop across the load resistor is outputted as an analog quantity representing the low order bits.

D/A converter

A transversal filter suitable for use in a ghost canceller of television receiver. The amplifiers of the transversal filter employ MOS transistors each loaded by a complementary connection of a P-MOS transistor and an N-MOS transistor constituting a C-MOS transistor pair.

Transversal filter incorporating MOS-transistor amplifiers

A charge transfer device has one or more charge injection areas each having an input diffusion layer and two or more input gate electrodes. An input signal is applied to the input diffusion layer, a clock voltage is applied to one of the input gates and an input reference voltage is applied to the other input gate to inject a signal charge proportional to a difference between the input reference voltage and the input signal, and the signal charge is sequentially transferred. A magnitude of the input reference voltage is changed in accordance with a magnitude of a maximum value of the input signal so that transfer of charges which do not contribute to signal component is suppressed and a transfer efficiency is improved.

Signal transfer system using a charge transfer device

An amplifier circuit using MOS transistors. The load to be connected to an amplifying element of the amplifier circuit is formed by a C-MOS transistor having a P-MOS transistor and an N-MOS transistor.

MOS-Transistor amplifier

A ghost reduction circuit for a television receiver incorporating a transversal filter comprises a memory for storing tap gains of tap gain amplifiers constituting part of the filter, a detector for detecting a ghost component as an error signal by comparing a vertical sync signal of the video signal passed through the filter with a reference sync signal, a circuit for converting a differentiated signal derived through differentiation of the error signal into a 3-state digital signal, and a subtractor for correcting the tap gain data stored in the memory in accordance with the digital signal, wherein the ghost component is substantially eliminated from the video signal inputted to the filter by controlling the gains of the tap gain amplifiers in accordance with the corrected memory data. The differentiated signal-to-digital signal conversion circuit includes first and second comparators having substantially the same threshold and connected in parallel between the input terminal and a subtracter, and an inverter amplifier connected between the input terminal and the second comparator. The outputs of the first and second comparators are subtracted from each other through the subtracter to produce the digital signal.

Ghost reduction circuit for a television receiver

A wide-band ghost reduction circuit apparatus for a television receiver comprises a ghost detector, two transversal filters having delay characteristics different from each other, a switch for selecting one of the filters and an automatic gain control circuit responsive to the output of the ghost detector for controlling the filters and the switch. Each of the transversal filters includes tap amplifiers whose gains are controlled by the automatic gain control circuit and having outputs connected, respectively, to tap inputs of delay devices formed of such as a CCD each provided with a tap and included in the associated transversal filter. Output end of one of the transversal filters having a smaller delay is connected to a selected one of the input tap of the other transversal filter through a switch so that input video signal components join together at every input terminal or every individual tap position of the delay devices.

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Tokyo, Japan

Masafumi Kazumi