Hitachi, Ltd.

Other

Hitachi Software Engineering Company, Ltd.

Masaaki Takahashi

Kazuji Yamada

Osamu Chiba

Hiroshi Arai

Junichi Hirai

Nobuhisa Kanamaru

Tamotsu Harihara

Toshio Ogawa

Noritaka Kamimura

Hideki Miyazaki

Kazuo Kato

Akira Kato

Hideo Suzuki

Junichi Saeki

Kazuhiro Suzuki

Tsutomu Yatsuo

Akihiro Tamba

Yutaka Misawa

Hirokazu Inoue

Hiroaki Hachino

Susumu Murakami

Keiichirou Nakanishi

Makoto Ishii

Hiroichi Shinohara

Toshiaki Kaminaga

Teruyuki Kagami

Masahiro Gouda

Yoichi Abe

Hideki Hamamura

A numerically controlled curved-surface machining unit equipped with three linearly moving axes and, at least, one rotary axis, including a simultaneous multiple-axis control NC machine numerically controlled by a numerical control unit with a numerical control NURBS interpolation function. The unit enables reading, as CL (cutter location) data, tool control point vector data and tool axis vector data, along a machining direction on a workpiece coordinate system for a curved surface, obtaining feed rates therefor, and calculation by conversion of the CL data into position vectors of three linear axes on a machine coordinate system, rotation angles and feed rates on the machine coordinate system so as to operate the simultaneous multiple-axis control NC machine on the basis of a machine configuration of the simultaneous multiple-axis control NC machine. The unit forms at least one NURBS curve having continuous curvature, calculates data therefor and converts the NURBS curve into NC data for NURBS interpolation.

Numerically controlled curved surface machining unit

A numerically controlled curved-surface machining unit comprises a component converting matrix&#xb7;angle-addition value forming function of converting CL (cutter location) data into components on a normal coordinate system on the basis of the machine configuration of the simultaneous multiple-axis control NC machine, a component converting function of converting from the workpiece coordinate system to the normal coordinate system, a function of forming second angles of a second rotary axis on the normal coordinate system, a compensating function of forming a continuous angle distribution from a distribution of the second angles, a function of forming first angles of a first rotary axis on a coordinate system rotated by the second angles at the second rotary axis, a compensating function of forming a continuous angle distribution from a distribution of the first angles, a machine coordinate transformation matrix forming function of obtaining a matrix for converting the tool control point vectors on the workpiece coordinate system into a machine coordinate system by using the first angles and the second angles, and a machine coordinate converting function of converting the tool control point vectors into the machine coordinate system by using the machine coordinate transforming matrix.

An electronic device has a wiring board mounted with an electronic circuit chip. A recess or through-hole is formed in a major surface of the wiring board on which the electronic circuit chip is mounted at a position corresponding to a central portion of the electronic circuit chip. Air trapped in a space between the electronic circuit chip and the wiring board is collected in the recess or through-hole to form a void separated from the electronic circuit chip.

Electronic device and method of fabricating the same

Performing NURBS (non-uniform rational B-spline) interpolation machining is performed by reading cutter location (CL) data consisting of a tool control point vector and a tool axis vector on a workpiece coordinate system, converting the CL data into a position vector of three linear axes and a rotation angle on a machine coordinate system in accordance with the machine configuration of a simultaneous multiple-axis NC machine, calculating knot vectors of a NURBS curve with the most suitable chord length on the basis of a position vector of the three linear axes and a rotation angle, calculating a NURBS curve of the three linear axes and one rotary axis using the knot vectors, converting the NURBS curve into NURBS interpolation NC data, converting the feed rate on a workpiece coordinate system into the feed rate per minute on a machine coordinate system, and transmitting NC data to a NC machine.

A semiconductor device includes a main circuit part having a semiconductor device formed on an electrode plate of a lead frame and a control circuit part having protective functions, which is integrally molded by a resin mold part into an integral mold structure.

Semiconductor device including an integrally molded lead frame

An input-output wiring for the power circuit and a ground layer are formed on a metal substrate of a power hybrid integrated circuit apparatus. A plurality of windows are opened at predetermined positions of a circuit substrate to which electronic parts such as an IC driver, a chip resistor etc. are connected. Ceramic chips are soldered on the exposed surface of the metal substrate in the windows, and the power semiconductor elements are connected through metal bridges on the ceramic chips. Connection between lower electrode of adjoining power semiconductor elements or between lower part of the power semiconductor element and an input/output wiring is made by means of a part of the metal bridge.

Power hybrid integrated circuit apparatus

Noise generated at high frequencies at the time of simultaneous switchings of logical circuits is reduced by lowering an inductance from LSI to a capacitor formed on a substrate. The capacitor is formed to ensure that an inductance from a bonding pad for the LSI loaded on the substrate to an electrode of the capacitor is 0.05 nanohenry. The lower inductance from the LSI to the capacitor allows a reduction in the amount of the noise at high frequencies among those generated in power supply system, whereby the rising time of signals is made shorter, and the speed of arithmetic operation can be increased.

Capacitor-carrying semiconductor module

A semiconductor device includes a semiconductor substrate having at least three semiconductor layers of alternately different conductivity types between a pair of principal surfaces. A pair of main electrodes are kept in low-resistance contact with the outermost ones of the semiconductor layers. A surface-passivation insulating film is provided on an exposed surface of the semiconductor substrate. A resistive material sheet is provided on the insulating film and connected electrically to semiconductor layers having their potentials substantially equal to the main electrodes.

Semiconductor device having high breakdown voltage

A semiconductor device is provided having a semiconductor substrate which has an annular moat formed in one major surface thereof and includes a pn junction terminating at an inner inclined side surface of the moat. In order to provide a high blocking voltage of the pn junction, the moat is filled or coated with glass material having a surface charge capable of inducing, in a semiconductor layer of one conductivity type in contact with the bottom of the moat, carriers having a polarity opposite to the above-mentioned conductivity type. An annular, highly-doped channel stopper region of the above-mentioned conductivity type is provided at the outside of the moat in a manner to be kept in contact with the moat, and the depth of the channel stopper region from the major surface is preferably made greater than the depth of the pn junction from the major surface.

pn Junction device with glass moats and a channel stopper region of

An etch solution for aluminum and the alloys thereof, after being used in caustic etching is regenerated, without using a large amount of heat energy for the concentration of the solution and without causing the accumulation of impurities in the etch solution, by

Method for regenerating an etch solution for aluminum and the alloys

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Hitachi, Japan

Masaaki Takahashi