Kabushiki Kaisha Toshiba

Toshiba Electronic Devices & Storage Corporation

Littelfuse Japan G.k.

Masaaki Iwai

Akira Yoshioka

Hung Hung

Toru Sugiyama

Naonori Hosokawa

Masaaki Onomura

Yasuhiro Isobe

Hitoshi Kobayashi

Tetsuya Ohno

Arata Tanaka

Tsuyoshi Takizawa

Takayuki Yokota

Ryoji Hasumi

Naotaka Ikawa

Hirotsugu Takegawa

Toshiya Ikeno

A semiconductor device according to an embodiment includes: a first nitride semiconductor layer having a first surface and a second surface; a first source electrode provided on the first surface; a first drain electrode provided on the first surface; a first gate electrode provided on the first surface between the first source electrode and the first drain electrode; a second nitride semiconductor layer having a third surface and a fourth surface, the third surface being provided on the second surface and facing the second surface, and the second nitride semiconductor layer having a smaller band gap than the first nitride semiconductor layer; and a first semiconductor device having a fifth surface provided on the fourth surface and facing the fourth surface with a size equal to or smaller than a size of the fourth surface, the first semiconductor device including a first semiconductor material having a smaller band gap than the second nitride semiconductor layer.

Semiconductor device

A semiconductor device includes a semiconductor package including an n-type channel normally-off transistor, a normally-on transistor, a first diode, and a Zener diode; a first terminal provided on the semiconductor package; a plurality of second terminals provided on the semiconductor package, and the second terminals being lined up in a first direction; a third terminal provided on the semiconductor package; a plurality of fourth terminals provided on the semiconductor package; and a plurality of fifth terminals provided on the semiconductor package, and the fifth terminals being lined up in the first direction.

Provided is a semiconductor device including a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode, a fourth electrode, and a second control electrode, a first capacitor having a first end and a second end, a Zener diode having a first anode and a first cathode, a first resistor having a third end and a fourth end, a first diode having a second anode and a second cathode, a second resistor having a fifth end and a sixth end, a second diode having a third anode and a third cathode, and a second capacitor having a seventh end and an eighth end.

A semiconductor device according to embodiments includes a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first element having a first end portion electrically connected to the first control electrode and a second end portion electrically connected to the first electrode, and the first element including a first capacitance component; and, a second element having a third end portion electrically connected to the first control electrode and the first end portion and a fourth end portion, and the second element including a second capacitance component, wherein, when a threshold voltage of the normally-off transistor is denoted by V, a maximum rated gate voltage of the normally-off transistor is denoted by V, a voltage of the fourth end portion is denoted by V, the first capacitance component is denoted by C, and the second capacitance component is denoted by C, V&#x3c;(C/(C+C))V&#x3c;V.

A semiconductor device of an embodiment includes a first nitride semiconductor layer; a second nitride semiconductor layer placed on the first nitride semiconductor layer; a first electrode placed on the second nitride semiconductor layer; a second electrode placed on the first nitride semiconductor layer; a gate electrode placed between the first electrode and the second electrode; a first field plate electrode placed on the second nitride semiconductor layer, the first field plate electrode having the same height as the gate electrode; and a second field plate electrode provided on an upper side of the first field plate electrode, the second field plate electrode being placed on a side of the second electrode compared to the first field plate electrode.

A semiconductor device includes first and second nitride semiconductor layers, a first electrode electrically connected to the first nitride semiconductor layer, a second electrode electrically connected to the first nitride semiconductor layer, a gate electrode between the first and second electrodes, a first field plate electrode electrically connected to the first electrode, a second field plate electrode between the gate electrode and the second electrode and electrically connected to the first electrode, a first conductive layer on the gate electrode, and a second conductive layer on the first conductive layer. A distance between the gate electrode and the second field plate electrode in a lateral direction is shorter than a distance between the first conductive layer and the second field plate electrode in the lateral direction, and is equal to or shorter than a distance between the second conductive layer and the second field plate electrode.

A semiconductor device of embodiments includes a first normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode electrically connected to the second electrode via a first wiring, a fourth electrode, and a second control electrode, a second normally-off transistor having a fifth electrode, a sixth electrode electrically connected to the third electrode via a second wiring, and a third control electrode, a first diode having a first anode electrically connected to the second control electrode and a first cathode electrically connected to the third electrode, and a capacitor having a first end portion connected to the first anode and the second control electrode and a second end portion.

A protection device including: (i) a protection component having a first thermal fuse and a resistive body, the resistive body being supplied with a current in an abnormal state to generate heat, the heat activating the first thermal fuse to cut off the current; (ii) a PTC component; and (iii) a second thermal fuse, the second thermal fuse being electrically connected in series to the PTC component, the first thermal fuse of the protection component being electrically connected in parallel to the PTC component and to the second thermal fuse, and the protection component being activated in the abnormal state so that the PTC component trips to generate heat, the heat blowing the second thermal fuse.

Protective device

The present invention provides a protection device that can more surely protect an electronic or an electric apparatus even when an inrush current value is large and its magnitude has large dispersion, and that has a recovery property. The protection device of the present invention includes a PTC component; a resistive component; and a first terminal and a second terminal, wherein the first terminal, the PTC component, the resistive component, and the second terminal are electrically connected in series in this order.

Protection device

A protective element including (i) a PTC element having an opening passing through in the thickness direction, and (ii) a first electrode and a second electrode positioned on both main surfaces of the PTC element, the protective element characterized in that the first electrode extends from a main surface of the PTC element over an edge thereof and into the opening wherein the PTC element is not prevented from expanding even when secured by a screw or caulking.

Protection element

A semiconductor integrated circuit design tool includes a reference data defining module configured to define design data of one of a plurality of transistors implementing the semiconductor integrated circuit as reference data, a simulator configured to simulate each effective channel length of the transistors, based on the design data and a reference channel length based on the reference data, and an adjuster configured to adjust gate lengths of gate electrodes of the transistors to reduce a difference between the effective channel length and the reference channel length.

Semiconductor integrated circuit design tool, computer implemented method for designing semiconductor integrated circuit, and method for manufacturing semiconductor integrated circuit

For making an isolation region on a semiconductor substrate without forming an unwanted bird beak, after forming an insulating film on the semiconductor substrate, the substate surface is covered with a resist mask. An LPD SiO.sub.2 film is deposited on the unmasked portion of the substrate surface, using a hydrofluoric acid solution containing silicon dioxide so as to be supersaturated. Thereafter, the mask is removed from the substrate surface. Further, after a groove is formed in the semiconductor substrate, it may be filled with the LPD SiO.sub.2 film to provide the isolation region in the substrate.

Growing community of inventors

Yokohama, Japan

Masaaki Iwai