Kyocera Corporation

Other

Masaaki Hori

Katsura Hayashi

Masaki Yamamoto

Masaaki Harazono

Yuji Iino

Riichi Sasamori

Tetsuo Hirakawa

Masanao Kabumoto

Shozo Kinoshita

Toshikazu Fujii

Hidenori Shikada

Provided is a curable sheet for the formation of a wiring circuit layer by circuit transfer from a transfer base material, wherein the curable sheet comprises (A) a reaction product between a polyphenylene ether resin and an unsaturated carboxylic acid or acid anhydride, (B) triallyl isocyanurate and/or triallyl cyanurate, (C) a hydrogenated block copolymer obtained by hydrogenation of a block copolymer comprising at least one polymer block A mainly comprising an aromatic vinyl compound and at least one polymer block B mainly comprising a conjugated diene compound, and (D) an inorganic filler; said Component (A), Component (B) and Component (C) being contained in amounts of 45 to 55 parts by weight, 55 to 45 parts by weight, and 25 to 35 parts by weight, respectively, each based on 100 parts by weight of total of Components (A) and (B), and said Component (C) being contained in an amount of 20 to 80 vol. %.

Curable sheet for circuit transfer

A wiring board comprising an insulating substrate containing at least an organic resin, a plurality of electrically conducting wiring layers formed on the surface and/or inside of said insulting substrate, and via-hole conductors formed in said insulating substrate in order to electrically connect the plurality of electrically conducting wiring layers, wherein said via-hole conductors contain an organic binder as well as a Cu&mdash;Sn intermetallic compound as an electrically conducting component. The via-hole conductors formed in the wiring board exhibit a high electric conductivity and a large heat resistance, making it possible to very highly reliably connect the electrically conducting wiring layers together.

Wiring board

A semiconductor element-housing package, comprising an insulating substrate composed of a plurality of laminated insulating layers and having a mounting portion for mounting a semiconductor element, in the center of a top surface thereof; a ground bonding pad and a power-supply bonding pad formed on the top surface of the insulating substrate, at the periphery of the semiconductor element-mounting portion, to which a ground electrode and a power-supply electrode of the semiconductor element are connected; and a pair of capacitor-connecting pads, formed on the underside of the insulating substrate, one of which is connected to the ground bonding pad, the other of which is connected to the power-supply bonding pad, and to both of which electrodes of a chip capacitor are connected, characterized by having a ground plane and a power-supply plane sandwiching at least one of the insulating layers buried opposing each other within the insulating substrate, and having electrical connections from the ground plane and the power-supply plane to the ground bonding pad and the power-supply bonding pad, respectively, at the periphery of the semiconductor element-mounting portion of the insulating substrate, to thereby downsize the package and to produce a satisfactory, noise-reducing effect.

Package for housing a semiconductor element

Growing community of inventors

Kokubu, Japan

Masaaki Hori