France Telecom

Stmicroelectronics S.a.

Maryse Paoli

Michel Haond

Pierre Brouquet

Thomas Skotnicki

Richard P Fournel

Didier Dutartre

Patrick Schiavone

Pascal Ribot

Alain Prola

Andr&eacute; Schiltz

A non-volatile memory includes a floating gate extending in a substrate between source and drain regions. A channel region may be confined by two insulating layers. The invention is particularly applicable to EPROM, EEPROM, Flash and single-electron memories using CMOS technology.

Fabrication processes for semiconductor non-volatile memory device

A method of correcting topographical effects on a microelectronic substrate, the method comprising the steps consisting in depositing a layer of resin on the structure to be planarized having topography in relief surrounded by isolation zones, and subjecting said resin layer in its zones superposed on underlying zones of high topographical density to photolithography by means of a mask possessing a standard mesh without any one-to-one coincidence with the underlying topography.

Method of correcting topographical effects on a micro-electronic substrate

The semiconductor device includes in a semiconductor substrate (1) at least one predetermined region (6) of the substrate intended subsequently to form an active area, uncovered on its upper surface and situated between lateral trenches (7) containing an insulative material including a layer (9) of a planarising first oxide and at least one underlying layer (8) of a conformal second oxide. The insulative material can form on either side of said uncovered predetermined region (6) of the substrate a boss (16) on the plane upper surface of the device (D) less than 1000 .ANG. high.

Method of isolating active areas of a semiconductor substrate by shallow

The semiconductor device comprises in a semiconductor substrate (1) at least one predetermined region (6) of the substrate intended subsequently to form an active area, uncovered on its upper surface and situated between the lateral trenches (7) containing an insulative material including at least one layer of a conformal oxide, the insulative material forming on either side of said uncovered predetermined region of the substrate a boss (16) on the plane upper surface of the device. The height of the boss is less than 1 000 .ANG. and the insulative material can also include planarising oxide.

Method of and device for isolating active areas of a semiconducor

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Villard Bonnot, France

Maryse Paoli