Cisco Technology, Inc.

Sioptical, Inc.

Lightwire, Inc.

Mary Nadeau

Vipulkumar K Patel

John Matthew Fangman

Mark Andrew Webster

Prakash B Gothoskar

David Piede

Ravi Sekhar Tummidi

Robert Keith Montgomery

Mittu Pannala

Jarrett S Neiman

Kalpendu Shastri

Jock T Bovington

Margaret Ghiron

Norbert Schlepple

Craig Young

Duane Stackhouse

Wenhong Qin

Dincer Birincioglu

Rajesh Dighde

John Fangman

Heatsinking in laser devices may be improved via a device, including: a header disk having a first face with a circumference; a header post that is thermally conductive, and having: a second face connected to the first face coterminously with the circumference; a third face opposite to the second face; and a fourth face perpendicular to the second face and the third face; a lens holder, having a fifth face connected to the third face; and an optical subassembly connected to the fourth face and optically aligned with the lens holder. The device may also be understood to comprise: a header disk having a circumference; a header post that is thermally conductive, the header post having: an arc coterminous to a portion of the circumference; a mounting face, perpendicular to a plane in which the arc and the circumference are defined; and a bonding face perpendicular to the mounting face.

Heatsinking in laser devices

A laser light source, a submount for a semiconductor laser, and a method of providing a laser light source are provided. The laser light source includes a submount with first and second electrical contacts thereon and a trench there-between. A semiconductor laser is bonded to the submount by bonding third and fourth electrical contacts of the laser to the first and second electrical contacts, respectively. The third and fourth electrical contacts of the laser are arranged on opposite side of a laser active stripe, which is arranged over the trench of the submount.

Bonded laser with solder-free laser active stripe in facing relationship with submount

Embodiments herein describe a photonic chip which includes a coupling interface for evanescently coupling the chip to a waveguide on an external substrate. In one embodiment, the photonic chip includes a tapered waveguide that aligns with a tapered waveguide on the external substrate. The respective tapers of the two waveguides are inverted such that as the width of the waveguide in the photonic chip decreases, the width of the waveguide on the external substrate increases. In one embodiment, these two waveguides form an adiabatic structure where the optical signal transfers between the waveguides with minimal or no coupling of the optical signal to other non-intended modes. Using the two waveguides, optical signals can be transmitted between the photonic chip and the external substrate.

Photonic chip with an evanescent coupling interface

An arrangement for improving adhesive attachment of micro-components in an assembly utilizes a plurality of parallel-disposed slots formed in the top surface of the substrate used to support the micro-components. The slots are used to control the flow and 'shape' of an adhesive 'dot' so as to quickly and accurately attach a micro-component to the surface of a substrate. The slots are formed (preferably, etched) in the surface of the substrate in a manner that lends itself to reproducible accuracy from one substrate to another. Other slots (&#x201c;channels&#x201d;) may be formed in conjunction with the bonding slots so that extraneous adhesive material will flow into these channels and not spread into unwanted areas.

Slotted configuration for optimized placement of micro-components using adhesive bonding

The embodiments herein describe a photonic chip (formed from a SOI structure) which includes an optical interface for coupling the optical components in the photonic chip to an external optical device. In one embodiment, the optical interface is formed on a separate substrate which is later joined to the photonic chip. Through oxide vias (TOVs) and through silicon vias (TSVs) can be used to electrically couple the optical components in the photonic chip to external integrated circuits or amplifiers. In one embodiment, after the separate wafer is bonded to the photonic chip, a TOV is formed in the photonic chip to electrically connect metal routing layers coupled to the optical components in the photonic chip to a TSV in the separate wafer. For example, the TOV may extend across a wafer bonding interface where the two substrates where bonded to form an electrical connection with the TSV.

Silicon photonic chip with through VIAS

An silicon-on-insulator (SOI)-based photonics platform is formed to including a venting structure for encapsulating the active and passive optical components formed on the SOI-based photonics platform. The venting structure is used to allow for the encapsulated components to 'breathe' such that water vapor and gasses will pass through the package and not condensate on any of the encapsulated optical surfaces. The venting structure is configured to also to prevent dust, liquids and other particulate material from entering the package.

Vent structures for encapsulated components on an SOI-based photonics platform

A plasma-based etching process is used to specifically shape the endface of an optical substrate supporting an optical waveguide into a contoured facet which will improve coupling efficiency between the waveguide and a free space optical signal. The ability to use standard photolithographic techniques to pattern and etch the optical endface facet allows for virtually any desired facet geometry to be formed&#x2014;and replicated across the surface of a wafer for the entire group of assemblies being fabricated. A lens may be etched into the endface using a properly-defined photolithographic mask, with the focal point of the lens selected with respect to the parameters of the optical waveguide and the propagating free space signal. Alternatively, an angled facet may be formed along the endface, with the angle sufficient to re-direct reflected/scattered signals away from the optical axis.

Coupling between free space and optical waveguide using etched coupling surfaces

A unitary optical receiver assembly is formed to include a V-groove passively aligned with a first aspheric lens (the lens formed along a surface perpendicular to the V-groove). An optical fiber is disposed along the V-groove and is used to bring the received optical signal into the unitary assembly. Upon passing through the first aspheric lens, the received optical signal will intercept a 45&#xb0; turning mirror wall that directs the signal downward, through a second aspheric lens (also molded in the unitary assembly), and then into a photosensitive device. Advantageously, the photosensitive device is disposed in passive alignment with the second aspheric lens, allowing for a received signal to be coupled from an incoming optical fiber to a photosensitive device without needing any type of active alignment therebetween.

Dual-lensed unitary optical receiver assembly

An arrangement for providing optical coupling into and out of a relatively thin silicon waveguide formed in the SOI layer of an SOI structure includes a lensing element and a defined reference surface within the SOI structure for providing optical coupling in an efficient manner. The input to the waveguide may come from an optical fiber or an optical transmitting device (laser). A similar coupling arrangement may be used between a thin silicon waveguide and an output fiber (either single mode fiber or multimode fiber).

Wideband optical coupling into thin SOI CMOS photonic integrated circuit

An arrangement for providing passive alignment between an optical fiber and the 'tip' of a nanotaper coupling waveguide (the nanotaper formed within the SOI layer of an SOI-based optoelectronic arrangement). The arrangement includes a separate fiber carrier support element, including a longitudinal V-groove for supporting the fiber and an alignment feature formed parallel thereto. The SOI structure is formed to include an associated alignment slot, so that as the fiber carrier is positioned over and attached to the SOI structure, the alignment feature and alignment slot will mate together and provide passive alignment of the optical fiber to the nanotaper waveguide tip.

Passive fiber alignment arrangement for coupling to nano-taper optical waveguides

An improvement in the reliability and lifetime of SOI-based opto-electronic systems is provided through the use of a monolithic opto-electronic feedback arrangement that monitors one or more optical signals within the opto-electronic system and provides an electrical feedback signal to adjust the operation parameters of selected optical devices. For example, input signal coupling orientation may be controlled. Alternatively, the operation of an optical modulator, switch, filter, or attenuator may be under closed-loop feedback control by virtue of the inventive monolithic feedback arrangement. The feedback arrangement may also include a calibration/look-up table, coupled to the control electronics, to provide the baseline signals used to analyze the system's performance.

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Alburtis, PA, United States of America

Mary Nadeau