Hewlett-packard Company

Agilent Technologies, Inc.

Avago Technologies General IP (singapore) Pte. Ltd.

Avago Technologies General IP Pte, Ltd.

Mary Louise Nash

Louise A Koss

Dale Beucler

Jeffrey R Rearick

The invention provides a method and an apparatus for enabling a user to determine whether a defective location in a memory device of an integrated circuit (IC) has been remapped to a location in a redundant memory portion of the memory device. Users are provided with the ability to observe the remapping, and preferably, to determine which locations in the memory device have been remapped. The memory device includes remapping observation logic that causes bits associated with remapping to be output from the memory device. Preferably, a computer receives the remapping bits and displays a description of any remapping on a display monitor. Therefore, not only is a user able to determine whether remapping has occurred, but also which locations in the memory device have been remapped.

Method and apparatus for enabling a user to determine whether a defective location in a memory device has been remapped to a redundant memory portion

An apparatus for the on-chip testing of random access memory arrays. In representative embodiments, embedded circuitry provides the ability to test random access memory arrays on-chip without requiring substantial area on the chip. The circuits are inherently located closer to the tested area which reduces propagation delay errors. These advantages have been obtained by locating the circuitry necessary to perform such test in the addressing and input/output blocks of the RAM.

Apparatus for random access memory array self-test

An apparatus for the on-chip, soft repair of random access memory arrays. In repesentative embodiments, circuitry is disclosed which provides the ability to soft repair defective random access memory arrays. The disclosed techniques for repair of random access memory arrays do not use techniques such as laser repair in the removal of defective parts of the integrated circuit and its replacement with a redundant part. No additional processing steps are involved. The circuitry necessary to repair defects in random access memory arrays is included on-chip in the input/output blocks of the RAM.

Apparatus for random access memory array self-repair

A circuit and method for detecting when converting a number from a floating point format to a fixed point format will result in a loss of precision. All bits but the most significant bit of the exponent of the floating point number are inverted. This results in a transformed exponent that is input to a comparator. The mantissa of the floating point number is input to a signed trailing one detector (STOD). The STOD outputs a signed number that indicates the bit position of the least significant logical '1' in the mantissa, plus a bias number. The bias number is chosen to be the number of bits in the fractional part of the fixed point format minus the number of bits in the mantissa. The output of the STOD is input to the other input of the comparator. The output of the comparator indicates whether or not a loss of precision occurs.

Minimal circuit for detecting loss of precision in floating point numbers

A graphics processing circuit for use in a graphics accelerator that includes a clipping processor, with a vertex input data path operatively connected to a vertex data input of the clipping processor. A clipping preprocessor has a vertex data input operatively connected to the vertex input data path and a control output operatively connected to a control input of the clipping processor. The clipping preprocessor is constructed and arranged to perform an evaluation of a relationship between primitive vertex data from the vertex input data path and a clip region and to provide a signal on the control output based on this evaluation.

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Fort Collins, CO, United States of America

Mary Louise Nash