Applied Materials, Inc.

Semitool, Inc.

Marvin L Bernt

Eric J Bergman

John Lee Klocke

Paul R McHugh

Prayudi Lianto

Kwan Wook Roh

Jing Xu

Daniel J Woodruff

Guan Huei See

Gregory J Wilson

Arvind Sundarrajan

Randy Harris

Thomas H Oberlitner

Anup Pancholi

Vincent Dicaprio

Richard W Plavidal

Brian Aegerter

Bioh Kim

Charles Sharbono

Sam Lee

Robert Douglas Mikkola

Adam Marc McClure

El Mehdi Bazizi

Bridger Earl Hoerner

Andrew Anten

Ronald Patrick Huemoeller

Greg Wilson

Trevor Henke

Craig Meuchel

James C Burnham

Jeffrey J Dennison

Liu Jiang

Jon Woodyard

Methods for substrate processing include attaching a plurality of dies to a first carrier, wherein each die has a first side and a second side opposite the first side, wherein the first side is attached to the first carrier and wherein the plurality of dies are spaced horizontally from one another on the first carrier; filling spaces between the plurality of dies and covering the second sides of the plurality of dies with a dielectric or metal; grinding or polishing the dielectric or metal covering the second sides and grinding or polishing the second sides until the second sides are exposed and the plurality of dies have a substantially uniform thickness; and after grinding or polishing, dishing die faces of the plurality of dies to a desired dishing profile.

Method for collective dishing of singulated dies

Methods and apparatus for single side filling of through-vias in a substrate are provided herein. In some embodiments, a method of filling through-vias in a substrate includes: coupling a first side of the substrate having through-vias to a carrier plate with an adhesive layer; exposing the through-vias to a conductive layer disposed between the carrier plate and the first side of the substrate; and plating the substrate using the conductive layer as a conductive seed layer to fill the through-vias with a conductive material.

Single side via fill process for through-vias

Exemplary methods of electroplating include contacting a patterned substrate with a plating bath in an electroplating chamber, where the pattern substrate includes at least one opening having a bottom surface and one or more sidewall surfaces. The methods may further include forming a nanotwin-containing metal material in the at least one opening. The metal material may be formed by two or more cycles that include delivering a forward current from a power supply through the plating bath of the electroplating chamber for a first period of time, plating a first amount of the metal on the bottom surface of the opening on the patterned substrate and a second amount of the metal on the sidewall surfaces of the opening, and delivering a reverse current from the power supply through the plating bath of the electroplating chamber to remove some of the metal plated in the opening on the patterned substrate.

Electrochemical depositions of nanotwin copper materials

In one embodiment, an electroplating cell for depositing a metal onto a surface of a substrate includes an electroplating chamber configured to receive an electrolyte containing metal ions and a substrate having a surface disposed to contact the electrolyte, wherein the surface of the substrate is configured to serve as a cathode and wherein the surface of the substrate includes an anomaly region at or near the outer perimeter of the surface of the substrate, an anode disposed in the electrolyte chamber, a shielding device disposed between the cathode and the anode to shield the anomaly section, an oscillator configured to impart a relative oscillation between the cathode and the shielding device, and a power source to cause an electric field between the anode and the cathode.

Systems and methods for shielding features of a workpiece during electrochemical deposition

Exemplary methods of electroplating a metal with a nanotwin crystal structure are described. The methods may include plating a metal material into at least one opening on a patterned substrate, where at least a portion of the metal material is characterized by a nanotwin crystal structure. The methods may further include polishing an exposed surface of the metal material in the opening to reduce an average surface roughness of the exposed surface to less than or about 1 nm. The polished exposed surface may include at least a portion of the metal material characterized by the nanotwin crystal structure. In additional examples, the nanotwin-phased metal may be nanotwin-phased copper.

Nanotwin copper materials in semiconductor devices

Exemplary methods of plating are described. The methods may include contacting a patterned substrate with a plating bath in a plating chamber. The patterned substrate includes at least one metal interconnect with a contact surface that is exposed to the plating bath. The metal interconnect is made of a first metal characterized by a first reduction potential. The methods further include plating a diffusion layer on the contact surface of the metal interconnect. The diffusion layer is made of a second metal characterized by a second reduction potential that is larger than the first reduction potential of the first metal in the metal interconnects. The plating bath also includes one or more ions of the second metal and a grain refining compound that reduces the formation of pinhole defects in the diffusion layer.

Diffusion layers in metal interconnects

A method for forming alignment marks leverages pad density and critical dimensions (CDs). In some embodiments, the method includes forming first and second alignment marks on a first substrate and a second substrate where the alignment marks have a width within 5% of the associated CD of copper pads on the respective substrates and forming a first and second dummy patterns around the first and second alignment marks. The first and second dummy patterns have dummy pattern densities within 5% of the respective copper pad density of the first and second substrates and CDs within 5% of the respective copper pad CDs. In some embodiments, alignment marks with physical dielectric material protrusions and recesses on opposite substrate surfaces may further enhance bonding.

Methods for forming alignment marks

A method of depositing a metal material on an isolated seed layer uses a barrier layer as a conductive path for plating. The method may include depositing a barrier layer on a substrate wherein the barrier layer provides adhesion for seed layer material and inhibits migration of the seed layer material, forming at least one isolated seed layer area on the barrier layer on the substrate, and depositing the metal material on the at least one isolated seed layer area using an electrochemical deposition process wherein the barrier layer provides a current path to deposit the metal material on the at least one isolated seed layer area.

Methods for electrochemical deposition of isolated seed layer areas

Exemplary methods of electroplating may include delivering a current from a power supply through a plating bath of an electroplating chamber for a first period of time. The current delivered may be or include a pulsed current at a duty cycle of less than or about 50%. The methods may include plating a first amount of metal on a substrate within the plating bath. The substrate may define a via within the substrate. The methods may include, subsequent the first period of time, transitioning the power supply to a continuous DC current delivery for a second period of time. The methods may include plating a second amount of metal on the substrate.

Electroplating seed layer buildup and repair

Embodiments of the present technology may include an electroplating system. The electroplating system may include a vessel. The system may also include a wafer holder configured for holding a wafer in the vessel. The system may further include an anode in the vessel. In addition, the method may include a plurality of thief electrodes. For each thief electrode of the plurality of thief electrodes, a thief current channel may be defined by a channel wall. The channel wall for each thief electrode may define an aperture adjacent to the wafer holder. The thief current channel may extend from each thief electrode to the aperture. The system may include a current control system in electrical communication with the plurality of thief electrodes. The current control system may be configured such that an amount of current delivered to each thief electrode can be adjusted independently.

Electroplating dynamic edge control

Methods of wetting a semiconductor substrate may include forming a controlled atmosphere in a processing chamber housing the semiconductor substrate. The semiconductor substrate may define a plurality of features, which may include vias. The methods may include flowing a wetting agent into the processing chamber. A chamber pressure may be maintained below about 100 kPa. The methods may also include wetting the plurality of features defined in the substrate.

Systems and methods for wetting substrates

A method of processing a semiconductor substrate includes: immersing a substrate in a first bath, wherein the substrate comprises a barrier layer, a conductive seed layer, and a patterned photoresist layer defining an opening; providing a first electric current between the conductive seed layer and a first anode disposed in electrical contact with the first bath to deposit a conductive material within the opening; stripping the patterned photoresist layer; immersing the substrate in a second bath; providing a second electric current that is a reverse of the first electric current between the conductive seed layer plus the conductive material and a second anode disposed in electrical contact with the second bath; etching the conductive seed layer from atop a field region of the barrier layer; and etching the barrier layer from atop a field region of the substrate.

Methods of enhancing polymer adhesion to copper

Electric potential, current density, agitation, and deposition rate are controlled to deposit metal alloys, such as tin based solder alloys or magnetic alloys, with minimal variations in the weight ratios of alloying metals at different locations within the deposited metal alloy feature. Alternative embodiments include processes that form metal alloy features wherein the variation in weight ratio of alloying metals within the feature is not necessarily minimized, but is controlled to provide a desired variation. In addition to metal alloys, alternative embodiments include processes for improving the deposition of single metal features.

Method of forming metal and metal alloy features

In a workpiece process end point detection system, light is diffused and then light intensity or color is sensed. Optical noise is greatly reduced and more accurate end point detection can be made. A light emitter and a light sensor may be located within a workpiece process chamber. A housing around the light emitter and the light sensor seals out process fluids and also diffuses light passing through. The diffused light may be optically filtered before reaching the light sensor.

Growing community of inventors

Whitefish, MT, United States of America

Marvin L Bernt