Xilinx, Inc.

Martin Sinclair

Nathan A Lindop

Brian Cotter

Gareth David Edwards

Scott Leishman

A method, computer-readable medium and apparatus for creating a platform-specific logic design from an input design are disclosed. For example, a method includes receiving an input design and an identification of a target device. The method next determines an unconnected external interface of the input design and detects an unconnected external interface of the target device. The method then generates an updated design from the input design. The updated design includes the input design and further includes a connection between the unconnected external interface of the input design and the unconnected external interface of the target device.

Automated generation of platform-specific logic designs for target environments from a common base design

A computer-implemented method of incorporating a module within a circuit design can include, responsive to identifying the module to be imported into the circuit design, automatically identifying each port of the module, displaying a list of the ports of the module, and receiving a user input selecting a plurality of ports of the module for inclusion in an interface through which the module communicates with the circuit design. Responsive to a user input specifying an interface type, the interface type can be associated with the plurality of ports. The interface type can be associated with a port list including standardized ports. Individual ones of the plurality of ports can be automatically matched with standardized ports from the port list. A programmatic interface description specifying the interface for the module can be output.

Creating interfaces for importation of modules into a circuit design

Within a system comprising a processor and a memory, a method of creating a circuit design for implementation within an integrated circuit can include inserting a placeholder block into the circuit design, wherein the circuit design includes a circuit block comprising circuitry and a circuit block interface, and wherein the placeholder block is devoid of circuitry and, responsive to receiving a user input specifying a coupling between the placeholder block and the circuit block, automatically determining a plurality of attributes of the circuit block interface. The method can include automatically generating, according to the attributes and by the processor, a placeholder interface within the placeholder block, wherein the placeholder interface is complementary to the circuit block interface. The placeholder block can be stored within the memory.

Placeholder-based design flow for creating circuit designs for integrated circuits

A system and method of managing interrupt requests from IP cores within an integrated circuit design can include capturing environmental constraints within constraint files for the integrated circuit design (where the constraints can include information regarding a board upon which an integrated circuit device is mounted, pin locations for interrupt signals, and the sensitivity of the interrupt signals), generating connections among interrupt sources, interrupt controllers, and interrupt request ports on microprocessor cores within a device environment, and automatically instantiating controller logic when interrupt controllers are lacking during compilation of the device design. The method and system can also identify within the design, processor and bus interconnections as well as each interrupt port on the IP cores and the sensitivity requirements for each port which can be stored within description files for a corresponding IP core instead of an HDL specification.

Managing interrupt requests from IP cores

A method is provided to incorporate information currently known about an integrated circuit's design, including peripheral components that share the same printed circuit board (PCB) with the integrated circuit, to automate a clock signal instantiation and routing solution to realize a comprehensive design. The information derived from a hardware design synthesis tool includes the existence of PCB resources, such as fixed-frequency oscillators, that may co-exist with a particular integrated circuit, such as a programmable logic device (PLD). Other derived information includes details concerning clock modules and cores that may exist within the PLD in accordance with the PLD's design specification. Once the information that describes the PLD and its environment is known, the information is utilized to automatically instantiate resource interconnect cores and automatically generate connections between the fixed-frequency oscillators, resource interconnect cores, and PLD implemented cores that are contained within the design.

Method of automating clock signal provisioning within an integrated circuit

A method of enabling the generation of reset signals in an integrated circuit is disclosed. The method comprises receiving information related to reset ports for a plurality of intellectual property cores in a design tool; providing an intellectual property core comprising a reset logic circuit adapted to generate a plurality of reset signals for the plurality of intellectual property cores; and generating, by the design tool, configuration data enabling programmable interconnects to couple a first reset signal of the plurality of reset signals to a first intellectual property core of the plurality of intellectual property cores and a second reset signal of the plurality of reset signals to a second intellectual property core of the plurality of intellectual property cores.

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Eskbank, United Kingdom

Martin Sinclair