Infineon Technologies Ag

Qimonda Ag

Testo Ag

Martin Schnell

Wolfgang Ruf

Andreas Logisch

Björn Flach

Monica De Castro Martins

Michael Schittenhelm

Ana Leao

Bjorn Flach

Rainer Kömmling

J&ouml;rg Stippler

Bj&ouml;rn Flach

Mónica De Castro Martins

In a measuring apparatus () having a measuring unit () according to the invention a spatially resolved measurement result detected using the measuring unit () of an object () is converted into a false-color image, and the false-color image is cast back or projected onto the object () by a display device ().

Method for visualizing spatially-resolved measurement results and corresponding measuring arrangement

A memory device in a semiconductor substrate includes at least one temperature sensor to provide a temperature dependent signal and at least one circuit to dissipate heat in response to a control signal. A control circuit is coupled to the at least one circuit and is operable to generate the control signal in response to the temperature dependent signal.

Semiconductor memory device with temperature control

The test method, integrated circuit and test system embodiments disclosed herein relate to testing at least one integrated circuit which uses an internal operating clock and has a first number of address pins, a second number of command pins and an address generation circuit which receives at least one encoded address information item using a third number of the address pins, which is smaller than the first number, and provides the other address pins as a fourth number of free address pins, where at least one first command is transferred using the command pins and at least one second command is transferred using at least one portion of the fourth number of the address pins from a test apparatus to the integrated circuit using a test clock which has a lower rate than the internal operating clock.

Test method, integrated circuit and test system

The invention provides a method for testing circuit units to be tested in a test apparatus, different identification units being assigned to the circuit units to be tested, the circuit units to be tested being connected to the test apparatus, a tester data stream including command blocks being output from the test apparatus, the tester data stream being compared with the identification units, the circuit unit to be tested, the identification unit of which matches the tester data stream output by the test apparatus, being activated and at least one command block for this circuit unit to be tested being processed in the circuit unit to be tested, whereupon the circuit unit to be tested is deactivated.

Circuit arrangement and method for driving electronic chips

An insertable calibration device for a programmable tester apparatus comprises at least one calibration unit and a control unit. The progammable tester apparatus is configured to test at least one electronic device with electronic circuits. The progammable tester apparatus comprises a holding device, contact-making devices for the electronic device, and tester channels for coupling in signals to the electronic device. The calibration unit is connected to a first tester channel to be calibrated. The calibration unit is configured to detect a calibration signal edge of a calibration signal that is transmitted by the tester apparatus at a certain transmission instant, to detect a reference signal edge of a reference signal that is transmitted by the tester apparatus via a second tester channel at a reference instant, to compare the instants at which the two signal edges arrive, and to output a comparison result. The control unit evaluates the comparison results and can be used to program the transmission instants in such a way that the instants at which the calibration signal edge and the reference signal edge arrive, for the compensation of signal propagation time differences, are substantially identical. The calibration device has the same form and connections as the electric device and is insertable into the holding device with an accurate fit instead of the electronic device.

Insertable calibration device

A tester for semiconductor components with a plurality of channels is connected to a specific semiconductor component in order to characterize the signal path between tester and semiconductor component under production conditions. The specific semiconductor component includes measuring units that are connected to connection contacts and in each case provide the functionality of a signal generator, a signal detector, a digital communication interface and a receiving unit for trigger signals. The specific semiconductor component further includes a trigger logic to convey trigger signals between the receiving unit of a first one and the signal generator or detector of a second one of the measuring units.

Semiconductor component, arrangement and method for characterizing a tester for semiconductor components

A backwards-compatible memory module is disclosed. According to one aspect, a memory module comprises addressable memory cells organized in organization units having a predetermined number of memory cells, a read/write control device clocked by a first clock signal, a plurality of prefetch registers for initially storing data read from the memory cells wherein the register size corresponds to the predetermined number. In a first operating mode, a switching device clocked by a second clock signal successively couples the prefetch registers to data input/output terminals. The number of data input/output terminals corresponds to the predetermined number. In a second operating mode, the switching device is controlled by at least one address signal and couples at least one of the prefetch registers to the data input/output terminals.

Backwards-compatible memory module

The present invention creates a memory chip, a memory component and a corresponding memory module. The memory chip is equipped with a multiplicity of memory cells and has an an [sic] array () of fuses and anti-fuses respectively, which can be written to and read individually in order to store specification information.

Memory chip, memory component and corresponding memory module and method

A method and device allow testing functionally identical semiconductor devices on a programmable testing device. The semiconductor devices are placed in magazine devices and a uniform magazine interface with respect to the testing device is provided for similar semiconductor devices in different types of packages. The semiconductor devices are advantageously tested one after the other on a testing device essentially without deference to their type of package and without any mechanical conversions being necessary on the testing device.

Growing community of inventors

Munich, Germany

Martin Schnell