International Business Machines Corporation

Centre National De La Recherche Scientifique

Ulvac, Inc.

Globalfoundries Inc.

Macronix International Co., Ltd.

Martin Michael Frank

Vijay Narayanan

Takashi Ando

Eduard Albert Cartier

Vamsi Krishna Paruchuri

Cyril Cabral, Jr

Rajarao Jammy

Evgeni Petrovich Gousev

Jeffrey W Sleight

John Rozen

Jin Ping Han

Supratik Guha

Renee Tong Mo

Matthew Warren Copel

Nestor A Bojarczuk, Jr

Isaac Lauer

Michael Patrick Chudzik

Pranita Kerber

Xiao Lin Sun

Shu-Jen Han

Barry P Linder

Alexander Reznicek

Paul Michael Solomon

Claude Ortolland

Devendra K Sadana

Ali Khakifirooz

Pouya Hashemi

Stephen W Bedell

Arvind Kumar

Teodor Krassimirov Todorov

Robert H Dennard

Hiroyuki Miyazoe

George Stojan Tulevski

Dennis Merton Newns

Paul Charles Jamison

Min Dai

Veeraraghavan S Basker

Josephine B Chang

Dechao Guo

Michael A Guillorn

Ying Di Zhang

Hariklia Deligianni

Katherine Lynn Saenger

Jack Oon Chu

Alejandro Gabriel Schrott

Herbert Lei Ho

Marwan H Khater

Kuen-Ting Shiu

Ramachandran Muralidhar

Damon B Farmer

Unoh Kwon

Jin Cai

Solomon Assefa

Emanuel Israel Cooper

Dae-Gyu Park

Bipin Rajendran

William M Green

Alessandro Cesare Callegari

Rishikesh Krishnan

Joseph Francis Shepard, Jr

Nicolas L Breil

Naim Moumen

Xiaoyan Shao

Young-Hee Kim

Kam-Leung Lee

George Gabriel Totir

Joris Van Campenhout

Guy M Cohen

Oleg Gluschenkov

Kevin K Chan

Hemanth Jagannathan

Keith Kwong Hon Wong

Son Van Nguyen

Christian Lavoie

Praneet Adusumilli

Cheng-Wei Cheng

Shreesh Narasimha

Ravikumar Ramachandran

Dirk Pfeiffer

Sufi Zafar

Siddarth A Krishnan

Peilin Song

Deborah A Neumayer

Steven John Koester

Masatoshi Ishii

John Albrecht Ott

Franco Stellari

Yurii A Vlasov

Robert L Bruce

Fenton Read McFeely

Jonathan Zanhong Sun

William K Henson

Shahab Siddiqui

Jean Fompeyrine

Jin-Ping Han

David James Frank

Stefan Abel

Yue Liang

Huiling Shang

Huai-Yu Cheng

A method of fabricating a synaptic device is provided. The method includes forming a channel layer between a first terminal and a second terminal. The channel layer varies in resistance based on a magnesium concentration in the channel layer. The method further includes forming an electrolyte layer. The electrolyte layer includes a magnesium ion conductive material. A third terminal is formed over the electrolyte layer and applies a signal to the electrolyte layer and the channel layer.

Magnesium ion based synaptic device

A method for mitigating moisture driven degradation of silicon doped chalcogenides includes placing a silicon doped chalcogenide composition in a process chamber, passivating dangling silicon bonds of the silicon doped chalcogenide composition by flooding the process chamber with forming gas or with hydrogen plasma, purging the forming gas or the hydrogen plasma from the process chamber, and removing the passivated silicon doped chalcogenide composition from the process chamber.

Mitigating moisture driven degradation of silicon doped chalcogenides

Embodiments of the present invention are directed to forming a sub-stoichiometric metal-oxide film using a modified atomic layer deposition (ALD) process. In a non-limiting embodiment of the invention, a first precursor and a second precursor are selected. The first precursor can include a metal and a first ligand. The second precursor can include the same metal and a second ligand. A substrate can be exposed to the first precursor during a first pulse of an ALD cycle. The substrate can be exposed to the second precursor during a second pulse of the ALD cycle. The second pulse can occur directly after the first pulse without an intervening thermal oxidant. The substrate can be exposed to the thermal oxidant during a third pulse of the ALD cycle.

Sub-stoichiometric metal-oxide thin films

Methods and systems for locating a filament in a resistive memory device are described. In an example, a device can acquire an image indicating an occurrence of photoemission from the resistive memory device. The device can determine a location of the filament in a switching medium of the resistive memory device using the acquired image.

RRAM filament location based on NIR emission

Embodiments of the present invention are directed to forming a ternary compound using a modified atomic layer deposition (ALD) process. In a non-limiting embodiment of the invention, a first precursor and a second precursor are selected. The first precursor includes a first metal and a first ligand. The second precursor includes a second metal and a second ligand. The second ligand is selected based on the first ligand to target a second metal uptake. A substrate is exposed to the first precursor during a first pulse of an ALD cycle and the substrate is exposed to the second precursor during a second pulse of the ALD cycle, the second pulse occurring after the first pulse. The substrate is exposed to a third precursor (e.g., an oxidant) during a third pulse of the ALD cycle. The ternary compound can include a ternary oxide film.

Ligand selection for ternary oxide thin films

A laterally switching cell structure including a metal-insulator-metal stack includes an active metal oxide layer including one or more sub-stoichiometric regions. The metal oxide layer includes one or more metal-oxides deposited conformally using a mixed precursor atomic layer deposition process. A graded oxygen profile in the metal oxide layer(s) of the stack including a mirrored impurity density may be formed wherein the sub-stoichiometric region(s) include a relatively high density of impurities obtained as reaction by-products. Arrays of cell structures can be formed with no requirement for a thick active electrode, allowing for more space for a metal fill and optional selector, thereby reducing access resistance.

Laterally switching cell having sub-stoichiometric metal oxide active layer

Artificial synaptic devices with an HfO-based ferroelectric layer that can be implemented in the CMOS back-end are provided. In one aspect, an artificial synapse element is provided. The artificial synapse element includes: a bottom electrode; a ferroelectric layer disposed on the bottom electrode, wherein the ferroelectric layer includes an HfO-based material that crystallizes in a ferroelectric phase at a temperature of less than or equal to about 400&#xb0; C.; and a top electrode disposed on the bottom electrode. An artificial synaptic device including the present artificial synapse element and methods for formation thereof are also provided.

Artificial synapse with hafnium oxide-based ferroelectric layer in CMOS back-end

Described herein is a crossbar array that includes a cross-point synaptic device at each of a plurality of crosspoints. The cross-point synaptic device includes a weight storage element comprising a set of nanocrystal dots. Further, the cross-point synaptic device includes at least three terminals for interacting with the weight storage element, wherein a weight is stored in the weight storage element by sending a first electric pulse via a gate terminal from the at least three terminals, the first electric pulse causes the nanocrystal dots to store a corresponding charge, and the weight is erased from the weight storage element by sending a second electric pulse via the gate terminal, the second electric pulse having an opposite polarity of the first electric pulse.

Multi-terminal cross-point synaptic device using nanocrystal dot structures

A method of forming a semiconductor device that includes forming a metal oxide material on a III-V semiconductor channel region or a germanium containing channel region; and treating the metal oxide material with an oxidation process. The method may further include depositing of a hafnium containing oxide on the metal oxide material after the oxidation process, and forming a gate conductor atop the hafnium containing oxide. The source and drain regions are on present on opposing sides of the gate structure including the metal oxide material, the hafnium containing oxide and the gate conductor.

Structures and methods for equivalent oxide thickness scaling on silicon germanium channel or III-V channel of semiconductor device

A method of forming a ferroelectric/anti-ferroelectric (FE/AFE) dielectric layer is provided. The method includes forming a metal electrode layer on a substrate, wherein the metal electrode layer has an exposed surface with at least 80% {111} crystal face, and forming an FE/AFE dielectric layer on the exposed surface of the metal electrode layer, wherein the FE/AFE dielectric layer is a group 4 transition metal oxide.

Hafnium oxide and zirconium oxide based ferroelectric devices with textured iridium bottom electrodes

A method is presented for incorporating a metal-ferroelectric-metal (MFM) structure in a cross-bar array in back end of the line (BEOL) processing. The method includes forming a first electrode, forming a ferroelectric layer in direct contact with the first electrode, forming a second electrode in direct contact with the ferroelectric layer, such that the first electrode and the ferroelectric layer are perpendicular to the second electrode to form the cross-bar array, and biasing the second electrode to adjust domain wall movement within the ferroelectric layer.

BEOL cross-bar array ferroelectric synapse units for domain wall movement

Controllable resistance elements and methods of setting the same include a junction field effect transistor configured to provide a resistance on a signal line. A first pass transistor is configured to apply a charge increment or decrement to the junction field effect transistor responsive to a control pulse, such that the resistance on the signal line changes.

Voltage controlled highly linear resistive elements

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Dobbs Ferry, NY, United States of America

Martin Michael Frank