Infineon Technologies Ag

Martin Mataln

Peter Singerl

Christian Schuberth

David Seebacher

Thomas Magesacher

Herwig Wappis

Gerhard Maderbacher

Franz Dielacher

A circuit for biasing a transistor is provided. The circuit includes an output terminal configured to be coupled to a gate terminal of the transistor and circuitry. In a first state, the circuitry is configured to output a control signal at a first voltage level for setting the transistor to a first transistor state. In a second state, the circuitry is configured to first output the control signal at a second voltage level different from the first voltage level following by changing the control signal from the second voltage level towards a third voltage level different from the first and second voltage level over time.

Circuit and method for biasing a transistor and corresponding device

An RF transmitter arrangement using analog pre-distortion is disclosed. The arrangement includes lower bandwidth circuitry, an analog pre-distorter, and a non-linear amplifier chain. The lower bandwidth circuitry is configured to generate an analog signal. The analog pre-distorter is configured to apply a non-linear distortion to the analog original signal based on a coupled feedback signal in order to generate an RF output signal. The non-linear amplifier chain is configured to amplify the RF output signal to generate a transmission signal relative to the analog original signal. The coupled feedback signal is derived from the transmission signal.

Analog RF pre-distorter and non-linear splitter

A non-linear pre-distortion engine maintaining constant peak power at its output is disclosed. The engine includes a compression estimator, a crest factor reduction processor, a digital pre-distorter and a power amplifier. The compression estimator is configured to generate a compression estimate based on an input signal and a feedback signal. The feedback signal is based on an RF output signal. The crest factor reduction processor is configured to reduce a crest factor of the input signal to generate a crest factor reduced signal based on the compression estimate. The digital pre-distorter is configured to apply a pre-distortion to the crest factor reduced signal after an initial phase and generate a pre-distorted signal based on pre-distortion parameters. The power amplifier is configured to amplify the pre-distorted signal to generate the RF output signal. The operation of the chain consisting of pre-distorter and power amplifier is substantially linear and the pre-distorter maintains constant peak power at its output, which eliminates unwanted avalanche or pre-distorter blow-up issues.

Devices and methods for adaptive crest factor reduction in dynamic predistortion

One embodiment relates to a system which includes a pre-distortion unit, a power amplifier circuit, a power amplifier model, and a parameter estimation unit. The pre-distortion unit is configured to pre-distort an input signal based on a model parameter by directly computing the model inverse in an iterative fashion, thereby providing a pre-distorted signal. The power amplifier circuit is configured to amplify the pre-distorted signal. The power amplifier model is configured to model amplification of the pre-distorted signal by the power amplifier circuit based on the pre-distorted signal and the model parameter. Based on the pre-distorted signal and an error signal, the parameter estimation unit is configured to update the model parameter provided to the pre-distortion unit and the power amplifier model. The error signal represents a difference between an output signal from the power amplifier circuit and a modeled output signal from the power amplifier model.

Device and method for adaptive digital pre-distortion

A nonlinear distorter is configured to mitigate nonlinearity from a nonlinear component of a nonlinear system. The nonlinear distorter operates to model the nonlinearity as a function of a piecewise polynomial approximation applied to segments of a nonlinear function of the nonlinearity. The nonlinear distorter generates a model output that decreases the nonlinearity of the nonlinear component.

Digital modulator non-linearity correction

A method for providing cross point information includes: providing an input signal having amplitude and phase information; interpolating between a first point of the input signal and a second point of the input signal to provide cross point information between the first point and the second point; and providing a pulse-width modulated signal based on the input signal and the cross point information.

Methods and devices for providing cross point information

In accordance with an embodiment, a system includes a first amplifier and a first bandpass filter having an input coupled in series with an output of the first amplifier, and an output configured to be coupled to a load. The bandpass filter has a lower input impedance at an in-band center frequency than at out-of-band frequencies, and the first amplifier is configured to receive a pulse width modulated waveform filtered according to a first transfer function that attenuates sidebands of the pulse width modulated waveform.

System and method for a power amplifier

In an embodiment, a method of producing a multi-level RF signal includes producing plurality of pulse-width modulated signals based on an input signal. The method further includes driving a corresponding plurality of parallel amplifiers with the plurality of pulse-width modulated signals by setting a parallel amplifier to have a first output impedance when a corresponding pulse-width modulated signal is in an active state and setting the parallel amplifier to have a second output impedance when the corresponding pulse-width is in an inactive state. The method also includes phase shifting the outputs of the plurality of parallel amplifiers, wherein phase shifting transforms the second output impedance into a third impedance that is higher than the second output impedance, and combining the phase shifted outputs.

System and method for generating a radio frequency pulse-width modulated signal

A pulse-width modulator (PWM) includes a plurality of comparators for comparing an input signal with a plurality of reference signals and for providing a plurality of corresponding comparison signals. The pulse-width modulator also includes a combinational logic for receiving the plurality of comparison signals and for generating a plurality of binary pulse-width modulation signals on the basis of the plurality of comparison signals. At most only a currently selected binary pulse-width modulation signal of the binary pulse-width modulation signals is at a first signal level at a time. The currently selected binary pulse-width modulation signal is associated to a specific reference signal of the plurality of reference signals which is currently closest to the input signal among the plurality of reference signals in terms of a given amplitude relation between the plurality of reference signals and the input signal.

Pulse-width modulator and methods of implementing and using the same

In accordance with an embodiment, a system includes a first transistor and a second transistor. The first transistor has a first input node coupled to a first signal input, a first output node coupled to a first common node, and a first reference node coupled to a first reference voltage, and the second transistor has a second input node coupled to second signal input, a second output node coupled to an output of the system, and a second reference node coupled to the first common node. The system further includes a first switch switchably coupling the first common node to a second reference voltage.

Growing community of inventors

Velden, Austria

Martin Mataln