Analog Devices,inc.

Analog Devices International Unlimited Company

Analog Devices Global Unlimited Company

Audi Ag

Martin Kessler

Lewis F Lahr

William Hooper

Miguel A Chavez

Peter Sealey

Robert W Adams

Christopher M Hanna

Stuart Patterson

Martin Perl

Eric M Cline

Prashant Tripathi

Philip Gregory Geerling

Eric Zolner

Michael Giancioppo

A network includes nodes. The nodes include a main node (MN) and a plurality of sub nodes (SNi=SN0, . . . SNX). Each node includes a node transceiver that is operable to perform data communication in accordance with a first network protocol. Each node transceiver includes and a positive power contact (V+) and a negative power contact (V−) operable to power the node transceiver to perform the data communication. The data communication network includes a two conductor combined power and data physical layer/medium. The physical layer connects the SN0 V+ to a bus power source positive power contact (VS+) in a first conductive path. The physical layer connects the MN V− and SNX V− to the bus power source negative power contact (VS−) in a second conductive path. The physical layer connects each SNi V−, for i=0 to X−1, to the SNi+1 V+ in the first conductive path.

Serial daisy-chained bus power for serial daisy-chained communication system

Disclosed herein are systems and techniques for remote bus enable. In some embodiments, a communication system with remote enable functionality may include: a master transceiver coupled to a downstream link of a bus; a voltage regulator, wherein the voltage regulator has a voltage output and an enable input, and the voltage output is coupled to the master transceiver; and a switch coupled to the enable input of the voltage regulator.

Systems and techniques for remote bus enable

Disclosed herein are two-wire communication systems and applications thereof. In some embodiments, a slave node transceiver for low latency communication may include upstream transceiver circuitry to receive a first signal transmitted over a two-wire bus from an upstream device and to provide a second signal over the two-wire bus to the upstream device; downstream transceiver circuitry to provide a third signal downstream over the two-wire bus toward a downstream device and to receive a fourth signal over the two-wire bus from the downstream device; and clock circuitry to generate a clock signal at the slave node transceiver based on a preamble of a synchronization control frame in the first signal, wherein timing of the receipt and provision of signals over the two-wire bus by the node transceiver is based on the clock signal.

Two-wire communication systems and applications

Disclosed herein are systems and techniques for audio and lighting control in a bus system. For example, in some embodiments, a bus system may be configured for operation as a light organ and/or to generate sound effects based on accelerometer data.

Audio and lighting control via a communication bus

Disclosed herein are systems and techniques for serial peripheral interface (SPI) functionality for node transceivers in a two-wire communication bus. For example, in some embodiments, a node transceiver may include SPI circuitry and upstream or downstream transceiver circuitry. SPI commands received via the SPI circuitry may be executed by the node transceiver, or transmitted upstream or downstream along the two-wire bus for execution by another node transceiver or a slave device coupled to another node transceiver.

Communication systems with serial peripheral interface functionality

Disclosed herein are systems and techniques for general purpose input/output (GPIO)-to-GPIO communication in a multi-node, daisy-chained network. In some embodiments, a transceiver may support GPIO between multiple nodes, without host intervention after initial programming. In some such embodiments, the host may be required only for initial setup of the virtual ports. In some embodiments, GPIO pins can be inputs (which may change virtual ports) or outputs (which may reflect virtual ports). In some embodiments, multiple virtual ports may be mapped to one GPIO output pin (with the values OR'ed together, for example). In some embodiments, multiple GPIO input pins may be mapped to one virtual port. For example, multiple GPIO input pin values may be OR'ed together, even if they come from multiple nodes.

GPIO-to-GPIO communication on a multi-node daisy-chained network

Disclosed herein are systems and techniques for adaptive use of multiple power supplies in a communication system. For example, in some embodiments, a slave device may include: an upstream transceiver to couple to an upstream link of a bus of a communication system; and circuitry to couple to the upstream link of the bus and to a local power supply, wherein the circuitry is to switch from providing the local power supply to power the slave device to providing bus power supplied by the upstream link of the bus to power the slave device.

Adaptive use of multiple power supplies in communication systems

Disclosed herein are systems and techniques for auxiliary master and/or auxiliary call support functionality. For example, in some embodiments, a communication system with auxiliary master functionality may include a master node coupled to a plurality of downstream slave nodes, wherein at least one of the slave nodes may perform master node functions when the master node is disconnected from the system.

Communication systems with auxiliary master and auxiliary call support functionality

Disclosed herein are systems and techniques for digital interfaces over a two-wire communication bus. For example, an electronic device to interface between a two-wire communication bus and a non-native digital interface may include: a digital interface to support a first digital interface protocol; and a transceiver, coupled to the digital interface, to couple to a link of the two-wire communication bus and to receive data via the link, wherein the data includes commands in accordance with a second digital interface protocol different from the first digital interface protocol; wherein the digital interface is to transmit the commands to a peripheral device in accordance with the second digital interface protocol.

Non-native digital interface support over a two-wire communication bus

Disclosed herein are systems and techniques for slave-to-slave communication in a multi-node, daisy-chained network. Slave nodes may provide or receive upstream or downstream data directly to/from other slave nodes, without the need for data slots first to route through the master node.

Synchronous slave-to-slave communications

Disclosed herein are systems and technique for distributed audio coordination over a two-wire communication bus. For example, in some embodiments, a first slave device may include circuitry to receive, over a two-wire bus a synchronization control frame, audio data, and a dynamics processor (DP) parameter for a second audio device coupled to a second slave device. The first slave device may include circuitry to derive timing information from the synchronization control frame, and circuitry to provide the audio data and a DP parameter (based on the DP parameter for the second audio device) to a first audio device coupled to the first slave device.

Growing community of inventors

Salem, MA, United States of America

Martin Kessler