Inphi Corporation

Clariphy Communications, Inc.

Martin Ignacio Del Barco

Mario Rafael Hueda

Oscar Ernesto Agazzi

Diego Ernesto Crivelli

Hugo Santiago Carrer

Alfredo Javier Taddei

Elvio Adrian Serrano

Norman L Swenson

Vadim Gutnik

Paul Voois

Ramiro Rogelio Lopez

Jorge Manuel Finochietto

Martin Carlos Asinari

Damian Alfonso Morero

Matias German Schnidrig

Mauro Marcelo Bruni

Federico Nicolas Paredes

Martin Serra

Facundo Abel Alcides Ramos

Pablo Gianni

Ariel Pola

Ramiro Matteoda

Pablo Gustavo Quiroga

Roman Antonio Arenas

Alejandro Javier Schwoykoski

Mario Alejandro Castrillon

Adrián Ulises Morales

Geoffrey O Hatcher

Shih Cheng Wang

Jeffrey Zachan

Michael Yeo

María Laura Ferster

Andre Chartrand

Lucas Javier Yoaquino

Damián Alfonso Morero

Ulises Morales

Laura Maria Ferster

Alejandro Castrillon

Maria Laura Ferster

A coherent receiver comprises an ingress signal path having an ingress line-side interface, and an ingress host-side interface. The ingress signal path is configured to receive an analog signal vector at the ingress line-side interface, to demodulate the analog signal vector, and to output a digital data signal Fat the ingress host-side interface. The coherent receiver also comprises clock and timing circuitry configured to receive a single reference clock signal and to provide a plurality of modified ingress path clock signals to different components of the ingress signal path, the plurality of modified ingress path clock signals derived from the single reference clock signal and the plurality of modified ingress path clock signals having different clock rates. The receiver, transmitter, or transceiver can operate in a plurality of programmable operating modes to accommodate different modulation/de-modulation schemes, error correction code schemes, framing/mapping protocols, or other programmable features.

Coherent transceiver architecture

An adaptive demapper adaptively demaps an input symbol. An input symbol is received and demapped in a hard-output demapper to generate a current detected symbol corresponding to a constellation point on a current constellation closest to the input symbol. A corrected inverse of a current noise power estimate is determined by updating a previous noise power estimate based on a difference between the input symbol and the current detected symbol. In a soft-output demapper, a log likelihood ratio corresponding to the current detected symbol is determined based on the corrected inverse of the current noise power estimate. The constellation point in the current constellation corresponding to the current detected symbol is then updated to generate an updated constellation based on a difference between the constellation point and the received input symbol.

Adaptive demapper

A receiver for fiber optic communications.

High-speed optical communications system

A transceiver for fiber optic communications. The transceiver can include a transmitter module having a transmitter host interface configured to receive an input host signal; a transmitter framer configured to frame the input host signal and to generate a framed host signal; and a transmitter coder configured to encode the framed host signal to generate an encoded host signal for transmission over a communication channel. The transceiver can also include a receiver module having a bulk chromatic dispersion, fiber length estimation, and coarse carrier recovery circuit configured to equalize a digital input ingress signal to generate an equalized ingress signal; a receiver framer configured to frame the equalized ingress signal to generate a framed ingress signal; and a receiver host interface configured to output the framed ingress signal. The receiver host interface is compatible with a framing protocol of the receiver framer.

Single-chip transceiver with electronic dispersion compensation for coherent optical channels

A transceiver for fiber optic communications.

A coherent receiver comprises an ingress signal path having an ingress line-side interface, and an ingress host-side interface. The ingress signal path is configured to receive an analog signal vector at the ingress line-side interface, to demodulate the analog signal vector, and to output a digital data signal at the ingress host-side interface. The coherent receiver also comprises clock and timing circuitry configured to receive a single reference clock signal and to provide a plurality of modified ingress path clock signals to different components of the ingress signal path, the plurality of modified ingress path clock signals derived from the single reference clock signal and the plurality of modified ingress path clock signals having different clock rates. The receiver, transmitter, or transceiver can operate in a plurality of programmable operating modes to accommodate different modulation/de-modulation schemes, error correction code schemes, framing/mapping protocols, or other programmable features.

Growing community of inventors

Cordoba, Argentina

Martin Ignacio Del Barco