Analog Devices,inc.

Martin Gerard Cotter

Patrick J Garavan

Joseph Michael Barry

Dennis A Dempsey

Michael G Tuthill

Anthony Gerard Scanlan

John Patrick Purcell

Vincent James Troy

A method for converting multi-bit digital video data signals to analogue form wherein the video data signals are in three formats, namely, standard definition, progressive scan and high definition formats, which permits a relatively low order analogue reconstruction filter to be used for filtering the analogue form of the signal. The three formats of the digital video data signals are over-sampled at relatively low over-sampling rates, the standard definition video signals being over-sampled at eight times the nyquist sampling frequency, the progressive scan format signals being over-sampled at four times the nyquist sampling frequency, while the high definition format signals are over-sampled at twice the nyquist sampling frequency. By virtue of the fact that the Video data signals are over-sampled at relatively low over-sampling rates, the over-sampled signals are subjected to sigma-delta modulation in a relatively low order sigma-delta modulator, namely, a second order sigma-delta modulator for noise shaping the quantisation noise. This, thus, permits the analogue reconstruction filter to be provided as a third order filter, and thus of relatively low order.

Method for converting a video signal from one of an analogue and digital form to the other of the analogue and digital form with enhanced signal to noise ratio

A method for selectively and sequentially converting digital video data signals in three formats, namely, standard definition, progressive scan and high definition formats to analogue form such that the same analogue reconstruction filter can be used for filtering the analogue forms of the signals after conversion. The digital signals prior to being converted are over-sampled at respective over-sampling frequencies for displacing image frequencies to frequencies sufficiently spaced apart from the widest band width signal so that the analogue reconstruction filter can be provided for filtering the widest band width signal as well as the other band width signals and also can be provided with a relatively low roll-off rate of attenuation. The standard definition video data signals are over-sampled at eight times the nyquist sampling frequency, and the progressive scan signals are over-sampled at four times the nyquist sampling frequency, thus displacing image frequencies of the standard definition and progressive scan signals to 108 MHz, so that the centre frequency of the image frequency is displaced to 108 MHz. The high definition video signals are over-sampled at twice the nyquist sampling frequency, thus displacing the image frequency of the high definition signal to 148.5 MHz, so that its centre frequency is displaced to 148.5 MHz. This, thus, leaves a frequency band gap of approximately 66 MHz between the high definition band width signal and the closest image frequency, namely, that of the progressive scan signal. The method can also be applied to the conversion of analogue video signals to digital form whereby the same analogue anti-aliasing filter can be used for the analogue signals in the three formats.

Method for converting a plurality of signals from one of a digital and analogue form to the other form

A charge redistribution analog-to-digital converter. This converter includes an offset correcting circuit operatively connected in parallel with a capacitor array and responsive to a sampling input of the analog-to-digital converter, and a gain correcting circuit operatively connected in parallel with a sampling capacitor and responsive to the sampling input of the analog-to-digital converter. In another general aspect, an analog-to-digital converter calibration method for a charge redistribution analog-to-digital converter, that includes adjusting an input offset of an input of the analog-to-digital converter and adjusting a gain offset of the analog-to-digital converter. The steps of adjusting are then repeated until a predetermined level of error is achieved for the analog-to-digital converter.

Charge redistribution analog-to-digital converter with system calibration

A switch architecture for a digital-to-analog converter provides improved linearity. A first switch for one leg of the R/2R resistance ladder includes a unit resistor coupled between the MOSFET devices of the switch and the respective leg of the R/2R ladder. The on resistances of the MOSFET devices of the first switch are controlled in response to a reference value, such as the resistance of a reference resistor, which may have a resistance and other characteristics similar to the unit resistor. Other switches for other legs of the R/2R ladder also have a unit resistor, or other MOSFET devices having an on resistance controlled in relation to the reference value. Additional switches for other legs of the R/2R ladder may also have MOSFET devices of varying width to channel (W/L) ratios. Each of these approaches may be combined to achieve a binary weighting or an alternate weighting between legs of the R/2R ladder, in order to provide low linearity error.

Switch architecture for R/2R digital to analog converters

Performing a coarse conversion of an analog signal to a coarse digital representation using a first analog-to-digital converter, transferring the coarse representation to a second converter, and performing a fine analog-to-digital conversion of the signal using the coarse representation as a starting value for a fine digital representation. The fine conversion can include a redundant portion that can be used to correct a mismatch between the coarse and fine conversions, and this correction can operate according to a combinatorial transfer function. The fine conversion may include switching from a coarse reference to a fine reference after transferring the coarse representation. The fine conversion can also include comparing an amount of charge in a sampling capacitor after performing the coarse conversion. Also disclosed is converting an analog signal to a digital representation having a first resolution level, adjusting a bandwidth of the converter circuit, and then continuing to convert the analog signal to a second, higher resolution level. The adjusting can include adjusting a bandwidth of a comparison circuit. Further disclosed is evaluating the amount of charge stored in a second sampling capacitor while tracking an analog signal with the first sampling capacitor. The amount of charge stored in the first capacitor is evaluated while tracking the signal with the second capacitor. Evaluating the amount of charge in the first capacitor can include comparing performed in part by a first comparator input stage, evaluating the amount of charge in the second capacitor can include comparing performed in part by a second comparator input stage. Analog-to-digital conversion circuitry can be multiplexed between the sampling capacitors.

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Ennis, Ireland

Martin Gerard Cotter