Emc Corporation

Martin Farley

Natan Vishlitzky

Hana Moreshet

Izhar Sharon

Douglas Eric LeCrone

William R Fairchild

Elizabeth E Patapoutian

Elizabeth C Patapoutian

Daniel A Murphy

Daniel P Murphy

A method for enabling a data processing system with a host running under an operating system and with a disk array storage device organized by logical devices to processes plural I/O requests from one or more host processors concurrently.

Method for enabling overlapped input/output requests to a logical device from multiple hosts with explicit allegiances

A method for enabling overlapped input/output requests to a logical device using assigned and parallel access unit control blocks. Each I/O request interrupts an operating system to assign a base and related unit control block to the input/output requests. In addition a parallel access control block is associated with each unit control block for a logical volume and a parallel access main control block is established with a logical volume through which each of the base and related unit control block can be identified. An input/output request to a logical device interrupts the operating system to assign one of the base and one of the assigned unit control blocks to the input/output requests after which control transfers back to the operating system. At a disk storage facility, the input/output request is located in a table with other input/output requests and corresponding parameters. The disk array storage facility tests the parameters for each new input/output request to determine which of a plurality of control functions will be performed.

Method for enabling overlapped input/output requests to a logical device using assigned and parallel access unit control blocks

A method for enabling for enabling overlapped input-output request to a logical device from multiple hosts with explicit allegiances. Parameters including an address range in a new input-output request are tested against corresponding address ranges in other input-output requests in a table assigned to the logical device. If a predetermined address range relationship exits, the new input-output guest transfers to an overlap polling queue.

A shared resource lock mechanism is provided which enables processors in a multi-processor environment which each share common resources to obtain locks on those resources. The lock mechanism also includes a reserve feature which provides a mechanism for a processor to maintain a lock on a resource for several input/output cycles. The lock mechanism combines the lock feature and the reserve feature in a single structure. This combination allows a processor to manipulate both the lock data and reserve data in a single transaction. Thus, in transactions requiring manipulation of both the lock and reserve elements, overhead is significantly reduced. In addition a unification of software routines which manipulate the lock and reserve data is achieved.

Lock mechanism for shared resources having associated data structure

A mass storage subsystem is used with a digital data processing system, the digital data processing system also including at least one host computer for generating access requests. The mass storage subsystem includes a data storage subsystem, a cache memory and a host adapter. The data storage subsystem includes at least one data storage device, the data storage device including a plurality of logical data store, each for storing a plurality of data items. Each data storage device is associated with a respective device lock used regulate access thereto. The cache memory includes a plurality of cache slots each caching data items from respective logical data stores. Each cache slot is associated with a slot lock for use in regulating access thereto. The host adapter receives access requests from the host computer, and is responsive to each access request to initially determine whether it holds the device lock associated with the data storage device containing the data item to be accessed in response to the respective access request. The host adapter, in response to a negative determination, determines whether the logical data store containing the data item to be accessed is said at least one cache slot and, if so, uses the slot lock associated therewith to control access thereby to the data item to be accessed.

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Cupertino, CA, United States of America

Martin Farley