Siemens Information & Communication Networks, Inc.

Siemens Communications, Inc.

Other

Martin Eugene Leonard

A Local Area Network based on a parallel bus architecture is disclosed. The LAN provides a means of utilizing relatively low cost CMOS circuitry to obtain performance superior to LAN's utilizing more exotic high speed technology. The disclosed LAN is based on a parallel bus having n&#xd7;8 data lines, &#xb1; power lines, and a clock line. The bandwidth of the LAN is the product of the number of data lines times the clock speed. Bandwidth is therefore scalable by increasing either the clock speed, the number of data lines, or both. Access to the bus is provided via ports which include transceivers, a clock receiver, and a configurable hardware interface. Each port is assigned an address based on a data line and a clock cycle. The invention features a network that becomes more efficient as usage increases, ports that can accept any medium, and an architecture that facilitates implementation of a true 'STAR' LAN configuration which interfaces between two or more serial communications links.

Parallel bus LAN

Methods for improving bus performance and bandwidth utilization in a Local Area Network (LAN) are disclosed along with methods fo adapting LANs for use with differing hardware interfaces. The LANs described are based on a parallel bus architecture. Performance superiority is gained by passing data between ports on parallel circuits that individually are relatively slow, but that, in the aggregate, provide bandwidth equivalent to or greater than serial LAN's of much higher frequency. The bandwidth advantage of the parallel architecture is extended by the logical advantage which permits efficient utilization of up to 99% of this bandwidth. This logical advantage rests in the capability of establishing glare and collision avoidance schemes that result in very little wasted bandwidth. The LANs described are adapted for use with differing hardware interfaces when provided with a plurality of bus ports, where each port has associated therewith a configurable hardware interface.

Methods for improving bus performance and bandwidth utilization of a parallel bus LAN

Methods and apparatus used in systems for communicating data (e.g., voice, video and alphanumeric data), including but not limited to telecommunications systems, computer systems, to efficiently utilize bandwidth by performing bit sensitive peer addressing. Apparatus (and related methods) for performing bit sensitive peer addressing include a parallel bus of data bits, a clock bit, a bid/busy bit, and an ack bit. The invention further includes a plurality of port devices coupled to the bus. Each port device includes bus interface circuitry, port control circuitry, and line interface circuitry. The clock signal is used to synchronize messages on the bus and to divide the time domain into timeslots (one timeslot being the reciprocal of the clock frequency). According to the invention, no frame reference is used and traffic on the bus is controlled using a protocol. Each port has an address which is one of the data bits of the bus. Ports bid for access to the bus by asserting their data line and the bid/busy line whenever the bid/busy line is not asserted by another. After seizing the bus, a source port keeps the bid/busy line asserted until it is done transmitting. When two or more ports bid for bus access at the same time, access is given to the port with the highest priority. According to a preferred embodiment of the invention priority is associated with the bit number.

Apparatus for performing bit sensitive parallel bus peer addressing

Given a parallel bus of data bits, a clock bit, a bid/busy bit, and an ack bit, and given a plurality of port devices coupled to the bus, a clock signal is used to synchronize messages on the bus and to divide the time domain into timeslots. No frame reference is used, and traffic on the bus is controlled using a protocol. Each port has an address which is one of the data bits of the bus. Ports bid for access to the bus by asserting their data line and the bid/busy line whenever the bid/busy line is not asserted by another. After seizing the bus, a source port keeps the bid/busy line asserted until it is done transmitting. When two or more ports bid for bus access at the same time, access is given to the port with the highest priority. Priority may be associated with the bit number.

Methods for performing bit sensitive parallel bus peer addressing

A device and method for separating particulate material from earth drilling fluids is disclosed, wherein the earth drilling fluids containing such particulate material is introduced into a container. A major portion of the particulate material separates out of the earth drilling fluid, and the fluid then passes over a baffle and through a screen, with the movement past the screen being such, combined with the screen orientation, to provide a screen which is somewhat self-cleaning in nature. The screen is periodically scraped by carrying members, and is urged against the carrying members so that the initial contact of the carrying members with the screen causes vibrations which improve the self-cleaning characteristics of the screen. The particulate material which settles out of the drilling fluid, and the particulate material which is screened out of the drilling fluid, is collected in the bottom of the container and is removed therefrom by the carrying members up an inclined wall to a discharge point.

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Hollister, CA, United States of America

Martin Eugene Leonard