Western Digital Technologies, Inc.

Hitachi Computer Products (america), Inc.

Martin E Schulze

Ebrahim Hashemi

Systems and methods related to wakeup circuits for electronic devices are disclosed. More particularly, an electronic device includes a component operable in at least a lower power state and a higher power state and a wakeup circuit configured to signal the component to transition from the lower power state to the higher power state upon declaration of a wakeup event. The wakeup circuit is configured to process a received input signal to synchronize with a clock; generate an activity signal that includes an activity pulse for each time the processed input signal changes state in different cycles of the clock; open a qualification window upon detection of a first activity pulse in the activity signal; and in the event more than a threshold number of activity pulses in the activity signal are detected prior to closing the qualification window, declare a wakeup event.

Wakeup detector

A test system including a storage device and a protocol analyzer coupled to the storage device. The storage device can include a diagnostic data transmission unit configured to transmit diagnostic data related to an operation of the storage device, and a host interface unit including a first selector configured to receive idle characters and the diagnostic data, wherein the first selector selectively transmits the idle characters or the diagnostic data. The protocol analyzer can be configured to autonomously receive the idle characters or the diagnostic data via the host interface unit.

Method and apparatus for transmitting diagnostic data for a storage device

The present invention provides a system of hardware and software that combine to form a redundant array of disk drives. This array provides a double means of redundancy that can reconstruct data from two simultaneously failed disks. The double redundancy means is implemented by two separate algorithms, DRR1 and DRR2. DRR1 takes the exclusive-or of all the commercial data and stores the result as redundancy data. DRR2 is similar to the algorithm described in Patel's article. As an additional feature, the implementation of DRR1 and DRR2 in the present invention is flexible enough to support either on-the-fly or read-modify-write level operation. Although both algorithms are in the prior art, the present invention improves on the run-time and space requirements of the algorithm. This improvement arises because of a novel relationship, discussed below, that exist between the individual T.sup.1 matrices and their column vectors that allows for a savings in computing the mapping of the commercial data to the redundancy data. This unique relationship is incorporated into the present systems hardware and software.

Growing community of inventors

Longmont, CO, United States of America

Martin E Schulze