Zarlink Semiconductor Limited

Mitel Semiconductor Limited

Martin Clive Wilson

Peter H Osborne

Simon Lloyd Thomas

A semiconductor device comprises a substrate ( ) having an insulating layer ( ) formed on a surface thereof, and a silicon layer ( ) located on a surface of the insulating layer. A trench ( ) extends from a surface of the silicon layer ( ) through the insulating layer ( ) and into the substrate ( ). An insulating liner ( ) is located on the side walls and the base of the trench ( ), and an in-fill ( ) of thermally-conductive material is formed within the insulating liner. The insulating liner ( ), the in-fill material ( ) and the distance over which the trench ) extends into the substrate ( ) are such as to promote flow of heat from the silicon layer ( ) to the substrate.

Semiconductor device

A method of forming an electrical isolation trench in a silicon-on-insulator (SOI) structure. The method comprises forming a first oxide layer on top of the upper silicon layer of the SOI structure, forming a polysilicon layer on top of said oxide layer, forming a second oxide layer on top of said polysilicon layer, patterning the first oxide layer, polysilicon layer, and second oxide layer to provide an etch mask, etching the upper silicon layer of the SOI structure to form said trench, and removing said second oxide layer and said polysilicon layer.

Semiconductor-on-insulator structure fabrication having a temporary plug

A number of npn and pnp bipolar transistors are formed in a single chip of silicon, so that some of the transistors have a greater frequency response than others The higher frequency transistors have their emitters located closer to the collectors, by positioning a collector, or emitter, of a transistor in a recessed portion of the surface of the chip. The recess is formed in an accurate and controlled manner by locally oxidising the silicon surface, and subsequently removing the oxide to leave the recess.

A number of npn and pnp bipolar transistors is formed in a single chip of silicon, so that some of the transistors have a greater frequency response than others. The higher frequency transistors have their emitters located closer to the collectors, by positioning a collector, or emitter, of a transistor in a recessed portion of the surface of the chip. The recess is formed in an accurate and controlled manner by locally oxidizing the silicon surface, and subsequently removing the oxide to leave the recess.

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Cricklade, United Kingdom

Martin Clive Wilson