Infineon Technologies Ag

Martin Benisek

Petteri Palm

Frank Daeche

Josef Maerz

Liu Chen

Martin Schober

Angela Kessler

Emanuele Bodano

Robert Fehler

Wolfgang Hoppe

Kushal Kshirsagar

A semiconductor package includes a laminate package substrate, first and second power transistor dies embedded within the laminate package substrate, a driver die embedded within the laminate package substrate, a plurality of I/O routings electrically connected with I/O terminals of the driver die, a switching signal pad electrically connected with a second load terminal of the first power transistor die and a first load terminal of the second power transistor die, and a shielding pad that is configured to electrically shield at least one of the I/O routings from the switching signal pad during operation of the first and second power transistor dies.

Embedded package with shielding pad

A power electronic assembly includes a board having metal layers laminated onto or between electrically insulating layers, and a laminate inlay embedded in the board. A first metal layer provides electrical contacts at a first side of the board. A second metal layer provides a thermal contact at a second side of the board. A third metal layer is positioned between the first metal layer and the laminate inlay and configured to distribute a load current switched by the laminate inlay. A fourth metal layer is positioned between the second metal layer and the laminate inlay and configured as a primary thermal conduction path for heat generated by the laminate inlay during switching of the load current. A first electrically insulating layer separates the fourth metal layer from the second metal layer so that the fourth metal layer is electrically isolated from but thermally connected to the second metal layer.

Power electronic assembly having a laminate inlay and method of producing the power electronic assembly

A power electronic assembly includes a board having metal layers laminated onto or between electrically insulating layers, and a power device embedded in the board. A first metal layer provides electrical contacts at a first side of the board. A second metal layer provides a thermal contact at a second side of the board. A third metal layer is positioned between the first metal layer and the power device and configured to distribute a load current switched by the power device. A fourth metal layer is positioned between the second metal layer and the power device and configured as a primary thermal conduction path for heat generated by the power device during switching of the load current. A first electrically insulating layer separates the fourth metal layer from the second metal layer so that the fourth metal layer is electrically isolated from but thermally connected to the second metal layer.

Power electronic assembly and method of producing thereof

An electronic printed circuit board has a memory module and a contact strip for insertion into another electronic unit. The memory module has at least nine identically designed housing-encapsulated integrated semiconductor memories configured on the printed circuit board. The longer dimension of the housing of one of the semiconductor memories, which is connected as an error correction chip, is oriented perpendicular to the contact strip. The longer dimension of the housings of the other semiconductor memories are oriented parallel to the contact strip. The different orientation of the semiconductor memories makes it possible to reduce the height of the printed circuit board while enabling the rectangular housings to keep the same physical form.

Electronic printed circuit board having a plurality of identically designed, housing-encapsulated semiconductor memories

A circuit module comprises a circuit board having a plurality of contact elements along a longitudinal edge thereof. The circuit board has arranged thereon a SDRAM memory component, the connections of this SDRAM memory component being each connected via resistance elements, which are implemented as individual resistors, to one of the contact elements through lines of limited length. The individual resistors are arranged in a line which extends parallel to the longitudinal direction of the circuit board.

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Munich, Germany

Martin Benisek