Intel Corporation

Marsha Eng

Stefan Rusu

Hong Wang

Edward Thomas Grochowski

Wei Ey Li

Perry H Wang

James Steven Burns

Vivek Tiwari

David J Ayers

Gerolf F Hoflehner

John Thomas Shen

John P Shen

Daniel M Lavery

Ed Grochowski

Alejandro Ramirez

Dan Lavery

A processor includes a digital throttle to monitor the activity of various units of the processor's instruction execution pipeline. The monitored activity is scaled according to the current operating point of the processor and a power state is determined from the scaled activity. If the power state reaches a first threshold, the operating point of the processor is adjusted and a new scaling factor is selected to determine the power state.

Digital throttle for multiple operating points

In one embodiment, the invention provides a method for examining information about branch instructions. A method, comprising: examining information about branch instructions that reach a write-back stage of processing within a processor, defining a plurality of streams based on the examining, wherein each stream comprises a sequence of basic blocks in which only a last block in the sequence ends in a branch instruction, the execution of which causes program flow to branch, the remaining basic blocks in the stream each ending in a branch instruction, the execution of which does not cause program flow to branch.

Apparatus to implement mesocode

In one embodiment, the invention provides a method for the processing of instructions. A method which comprises analyzing a dynamic execution trace for a program; identifying at least one stream comprising a plurality of basic blocks in the dynamic execution trace; collecting metrics associated with the at least one stream; and optimizing the at least one stream based on the metrics.

Building inter-block streams from a dynamic execution trace for a program

A processor includes a digital throttle to monitor the activity of various units of the processor's instruction execution pipeline, and to determine a power state for the processor from the monitored activity. One of two or more power control mechanisms is engaged, responsive to the power state of the processor reaching a threshold.

Multiple mode power throttle mechanism

Growing community of inventors

Sunnyvale, CA, United States of America

Marsha Eng