Intel Corporation

Marvell International Limited

Marvellworld Trade Ltd.

Marlon Moncrieffe

Premanand Sakarda

Bryan C Morgan

Priya N Vaidya

Scott B Peirce

Minda Zhang

Yu Bai

Michael D Rosenzweig

Jia Bao

Cesare Ferri

Palanisamy Mohanraj

Systems, devices, and techniques relating to remote debugging are described. A described device includes a first processor core configured to provide an application execution environment, memory coupled with the first processor core; a second processor core configured to provide a secure execution environment; and a communication interface coupled with the first processor core and the second processor core, the communication interface being configured to communicate with external devices, the communication interface being shared at least between the application execution environment and the secure execution environment. The second processor core can be configured to monitor the application execution environment of the first processor core, determine whether to allow a debug session with an external device, via the communication interface, based on credentials received from the external device, and provide, via the debug session, read and write access to the memory and one or more registers of the first processor core.

System and method for establishing a trusted diagnosis/debugging agent over a closed commodity device

In one embodiment, an electronic apparatus comprises at least one processor and a computer readable medium coupled to the processor and comprising logic instructions encoded in the computer readable medium, wherein the instructions, when executed in a processing system, cause the processing system to perform operations comprising initializing a direct memory access profiler in an electronic system, wherein the direct memory access is coupled to a policy manager in the electronic system, measuring at least one memory consumption characteristic of the electronic system, communicating the at least one memory consumption characteristic to a policy manager of the electronic system, and using the at least one memory consumption characteristic to adjust a power state of the electronic system.

System for managing power provided to a processor or memory based on a measured memory consumption characteristic

Dynamic processor core switching is described. In embodiments, a multi-core processor system can include a first processor core that executes computer instructions at a first processing rate, and can include at least a second processor core that executes the computer instructions at a second processing rate, where the second processing rate is different than the first processing rate. A core profiler can generate system profile data that is evaluated to determine when a core-switch manager initiates switching execution of the computer instructions from the first processor core to the second processor core while the computer instructions are being executed.

Dynamic processor core switching

Some of the embodiments of the present disclosure provide a method comprising generating a plurality of power profiles for a corresponding plurality of processing cores, wherein each power profile of the plurality of power profiles includes power consumptions of a corresponding processing core under various operating conditions; generating a plurality of candidate configurations, wherein each candidate configuration comprises corresponding candidate operating conditions for the plurality of processing cores; and based at least in part on the plurality of power profiles, selecting a first candidate configuration of the plurality of candidate configurations for managing the plurality of processing cores. Other embodiments are also described and claimed.

System and method for selecting a power management configuration in a multi-core environment to balance current load demand and required power consumption

System and method for selecting a power management configuration in a multi-core environment according to various operating conditions such as voltage, frequency, power mode, and utilization factor varied on a per-core basis

Power management in electronic systems

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Leominster, MA, United States of America

Marlon Moncrieffe