Infineon Technologies Ag

Infineon Technologies Austria Ag

Infineon Technology Ag

Infineon Technology Austria Ag

Markus Zundel

Franz Hirler

Andreas Peter Meiser

Hans-Joachim Schulze

Norbert Krischke

Rudolf Zelsacher

Walter Rieger

Uwe Schmalzbauer

Anton Mauder

Thomas Krotscheck Ostermann

Peter Nelle

Armin Willmeroth

Martin Poelzl

Christoph Kadow

Peter Irsigler

Dirk Ahlers

Andrew Christopher Graeme Wood

Peter Maier Brandl

Thorsten Meyer

Frank Dieter Pfirsch

Ralf Siemieniec

Stefan Sedlmaier

Erwin Bacher

Karl-Heinz Bach

Hans Weber

Till Schloesser

Johannes Baumgartl

Paul Ganitzer

Andrew Wood

Christian Kampen

Dietmar Kotz

Ludger Borucki

Juergen Holzmueller

Rolf Weis

Oliver Blank

Manfred Schneegans

Dietrich Bonart

Michael Hutzler

Hermann Gruber

Gudrun Stranzl

Reinhard Ploss

Thomas Gross

Georg Ehrentraut

Stefan Mieslinger

Ralf Henninger

Kurt Matoy

Donald Dibra

Alexander Susiti

Hermann Peri

Oliver Haeberlen

Manfred Engelhardt

Rainald Sander

Stephan Voss

Markus Dinkel

Joachim Krumrey

Steffen Thiele

Michael Sorger

Hubert Maier

Andreas Behrendt

Mathias Von Borcke

Thomas Schweinboeck

Jesper Wittborn

Vanessa Capodieci

Erwin Vogl

Hans-Peter Lang

Arunjai Mittal

Joachim Mahler

Edward Fuergut

Johannes Georg Laven

Jenoe Tihanyi

Wolfgang Werner

Carsten Ahrens

Werner Schustereder

Jens Peter Konrath

Guenther Ruhl

Thomas Fischer

Martin Henning Vielemeyer

Frank Hille

Andre Schmenn

Damian Sojka

Jochen Hilsenbeck

Manfred Kotek

Joerg Ortner

Gianmauro Pozzovivo

Guenther Schindler

Sven Lanzerstorfer

Markus Winkler

Rainer Pelzer

Lutz Goergens

Joost Larik

Gabriela Brase

Margarete Deckers

Sergey Ananiev

Holger Doepke

Jacob Tillmann Ludwig

Isabella Goetz

Nicola Vannucci

Mathias Racki

Hans Joachim Schulze

Mathias Hans-Ulrich Alexander Von Borcke

A method of manufacturing a semiconductor body includes forming a pattern at a first side of a substrate, forming a semiconductor layer on the first side of the substrate, attaching the substrate and the semiconductor layer to a carrier via a surface of the semiconductor layer, and removing the substrate from a second side opposite to the first side.

Semiconductor device having contact trenches extending from opposite sides of a semiconductor body

A transistor includes: gate electrodes and field electrodes, wherein in each case one gate electrode and one field electrode are arranged one above another in a vertical direction in a common trench of a semiconductor body; a gate pad to which the gate electrodes are connected; and a source metallization arranged above the semiconductor body. The field electrodes of a first group include at least one contact section. The at least one contact section is arranged between two sections of a gate electrode arranged in the same trench and is connected to the source metallization. The two sections of the gate electrode are separated from one another in a region of the contact section. At least one of the two sections of the gate electrode arranged in the same trench is electrically connected to a gate electrode arranged in a further trench by way of a gate connecting electrode.

Transistor component having gate electrodes and field electrodes

A semiconductor device includes a semiconductor substrate having a first main surface and a metal structure above the first main surface. The metal structure has a periphery region that includes a transition section along which the metal structure transitions from a first thickness to a second thickness less than the first thickness. A polymer-based insulating material contacts and covers at least the periphery region of the metal structure. A thickness of the polymer-based insulating material begins to increase on a first main surface of the metal structure that faces away from the semiconductor substrate and continues to increase in a direction towards the transition section. An average slope of a surface of the polymer-based insulating material which faces away from the semiconductor substrate, as measured with respect to the first main surface of the metal structure, is less than 60 degrees along the periphery region of the metal structure.

Semiconductor device with polymer-based insulating material and method of producing thereof

According to an embodiment of a semiconductor device, the semiconductor device includes: a first active cell area comprising a first plurality of parallel gate trenches; a second active cell area comprising a second plurality of parallel gate trenches; and a metallization layer above the first and the second active cell areas. The metallization layer includes: a first part contacting a semiconductor mesa region between the plurality of parallel gate trenches in the first and the second active cell areas; and a second part surrounding the first part. The second part of the metallization layer contacts the first plurality of gate trenches along a first direction and the second plurality of gate trenches along a second direction different from the first direction.

Gate contact structure for semiconductor device

A semiconductor device includes a semiconductor body having a first surface. A first trench extends in a vertical direction into the semiconductor body. The semiconductor device also includes a first interlayer in the first trench and a first dopant source in the first trench. The first interlayer is arranged between the first dopant source and the semiconductor body, and the first dopant source includes a first dopant species. The semiconductor device also includes a semiconductor area doped with the first dopant species and which completely surrounds the first trench at least at a depth in the semiconductor body and adjoins the first trench.

Semiconductor device with a dopant source

A power semiconductor device includes a semiconductor body configured to conduct a load current. A load terminal electrically connected with the semiconductor body is configured to couple the load current into and/or out of the semiconductor body. The load terminal includes a metallization having a frontside and a backside. The backside interfaces with a surface of the semiconductor body. The frontside is configured to interface with a wire structure having at least one wire configured to conduct at least a part of the load current. The frontside has a lateral structure formed at least by at least one local elevation of the metallization. The local elevation has a height in an extension direction defined by a distance between the base and top of the local elevation and, in a first lateral direction perpendicular to the extension direction, a base width at the base and a top width at the top.

Terminal structure of a power semiconductor device

A transistor device includes at least one transistor cell which includes: a source region, a body region and a drift region in a semiconductor body; a gate electrode dielectrically insulated from the body region by a gate dielectric; a field electrode dielectrically insulated from the drift region by a field electrode dielectric; and a contact plug extending from a first surface of the semiconductor body to the field electrode. A portion of the semiconductor body is arranged between the field electrode trench and the first surface of the semiconductor body. The portion of the semiconductor body that is arranged between the field electrode trench and the first surface comprises the body region. The body region directly contacts the upper surface of the field electrode dielectric.

Transistor having at least one transistor cell with a field electrode

Semiconductor device with multi-branch gate contact structure

A semiconductor device of an embodiment includes a transistor device in a semiconductor die including a semiconductor body. The transistor device includes transistor cells connected in parallel and covering at least 80% of an overall active area at a first surface of the semiconductor body. The semiconductor device further includes a control terminal contact area at the first surface electrically connected to a control electrode of each of the transistor cells. A first load terminal contact area at the first surface electrically connected to a first load terminal region of each of the transistor cells. The semiconductor device further includes a resistor in the semiconductor die and electrically coupled between the control terminal contact area and the first load terminal contact area, and a pn junction diode electrically connected in series with the resistor. A method of producing the semiconductor device is also described.

Semiconductor device including an integrated resistor and method of producing thereof

An alternator assembly includes an input terminal configured to input an alternating voltage, an output terminal configured to output a rectified voltage, and a gated diode arranged in a load path between the input terminal and the output terminal.

Alternator assembly having a gated diode arranged in a load path between an input terminal and an output terminal

Disclosed is a transistor device and a method for producing thereof. The transistor device includes at least one transistor cell, wherein the at least one transistor cell includes: a source region, a body region and a drift region in a semiconductor body; a gate electrode dielectrically insulated from the body region by a gate dielectric; a field electrode dielectrically insulated from the drift region by a field electrode dielectric; and a contact plug extending from a first surface of the semiconductor body to the field electrode and adjoining the source region and the body region.

A semiconductor wafer having a main surface and a rear surface opposite from the main surface is provided. A die singulation preparation step is performed in kerf regions of the semiconductor wafer. The kerf regions enclose a plurality of die sites. The die singulation preparation step includes forming one or more preliminary kerf trenches between at least two immediately adjacent die sites. The method further includes forming active semiconductor devices in the die sites, and singulating the semiconductor wafer in the kerf regions thereby providing a plurality of discrete semiconductor dies from the die sites. The one or more preliminary kerf trenches are unfilled during the singulating, and the singulating includes removing semiconductor material from a surface of the semiconductor wafer that is between opposite facing sidewalls of the one or more preliminary kerf trenches.

Preliminary trenches formed in kerf regions for die singulation

A semiconductor component includes a field-effect transistor arrangement having a drift zone and body region between the drift zone and a first surface of a semiconductor body. Trench structures of a first type extend from the first surface into the semiconductor body and have a maximum lateral dimension at the first surface which is less than a depth of first and second ones of the trench structures. A net doping concentration at a reference depth at a first location in the drift zone is at least 10% greater than at a second location in the drift zone at the reference depth, which is located between the body region and a bottom of the first trench structure. The first location is at the same first lateral distance from the first and second trench structures. The second location is at the same second lateral distance from the first and second trench structures.

Semiconductor component comprising trench structures and production method therefor

A semiconductor device of an embodiment includes a transistor device in a semiconductor die including a semiconductor body. The transistor device includes transistor cells connected in parallel and covering at least 80% of an overall active area at a first surface of the semiconductor body. The semiconductor device further includes a control terminal contact area at the first surface electrically connected to a control electrode of each of the transistor cells. A first load terminal contact area at the first surface electrically connected to a first load terminal region of each of the transistor cells. The semiconductor device further includes a resistor in the semiconductor die and electrically coupled between the control terminal contact area and the first load terminal contact area.

Semiconductor device including an integrated resistor

A power semiconductor element having a lightly doped drift and buffer layer is disclosed. One embodiment has, underneath and between deep well regions of a first conductivity type, a lightly doped drift and buffer layer of a second conductivity type. The drift and buffer layer has a minimum vertical extension between a drain contact layer on the adjacent surface of a semiconductor substrate and the bottom of the deepest well region which is at least equal to a minimum lateral distance between the deep well regions. The vertical extension can also be determined such that a total amount of dopant per unit area in the drift and buffer layer is larger than a breakdown charge amount at breakdown voltage.

Power semiconductor having a lightly doped drift and buffer layer

Growing community of inventors

Egmating, Germany

Markus Zundel