Wago Verwaltungsgesellschaft Mbh

Magna Pt B.v. & Co. Kg

Getrag B.v. & Co. Kg

Horna Gmbh Verpackungen

Markus Weidner

Martin Seufert

Guenter Ruehle

Alexander Kiehlneker

Günter Rühle

Alexander Buelow

Christian Anzt

Michael Langreder

Pawel Loskot

Thomas Horna

Andreas Pawlenka

Jens Heyer

Illustrated is an I/O module which is configured for cyclically transmitting and receiving telegrams, wherein an area in which a data record can be transmitted in its entirety is provided in the telegrams, as well as an area capable of containing only a part of a data record, so that said data record is transmitted, distributed over several telegrams.

Transmission of diagnostic and/or parameter data between a control module and an input/output module

A system for producing a data stream based on redundant information that has a first controller, a second controller and a circuit. The first controller outputs a first part of first data via a first data output. The second controller outputs a second part of second data via a second data output. The circuit combines the data that is output to form a data stream. The first controller reads in at least the second part of second data of the combined data stream. The second controller reads in at least the first part of first data of the combined data stream. The read-in second part of second data is compared with a second part of the first data and if the comparison indicates a deviation, to stop outputting data via the first data output and/or to block the forwarding of the data stream.

System for producing a data stream on the basis of redundant information

A circuit is provided that has three clock sources, a first processing unit connected to the first clock source, a second processing unit connected to the second clock source, and an input unit. The first processing unit has a first logic circuit and a first memory circuit connected to the first logic circuit, wherein a first set of instructions, which is designed to implement a first control program when executed by the first logic circuit, is stored in the first memory circuit, wherein the first clock source specifies a clock timing of the execution of the first set of instructions. The second processing unit has a second logic circuit and a second memory circuit connected to the second logic circuit, wherein a second set of instructions, which is designed to implement a second control program when executed by the second logic circuit, is stored in the second memory circuit.

Control of redundant processing units

Growing community of inventors

Minden, Germany

Markus Weidner