Infineon Technologies Ag

Daimler Chrysler Ag

Markus Thoben

Reinhold Bayerer

Christoph Koch

Andre Uhlemann

Tao Hong

Alexander Schwarz

Richard Boettcher

Gerhard Palm

Yehia Tadros

Marc Buschkuehle

Hartwig Rueckert

Stefan Diesner

Mirko Horaschek

Juergen Huertgen

Werner Kopmeier

Lorenz Slansky

A circuit arrangement has a populated circuit carrier and includes a flat insulation carrier having a top side and a patterned metallization layer on the top side and a first power semiconductor chip arranged on a first section of the metallization layer. The first power semiconductor chip has a first lower chip load terminal electrically conductively connected to the first section. A shunt resistor is arranged on a second section of the metallization layer. The shunt resistor has a lower main terminal electrically conductively connected to the second section. An electrically conductive connection is provided between the first section and the second section. The electrically conductive connection includes a constriction between the first section and the second section so that a current which flows between the first lower chip load terminal and the lower main terminal during operation of the circuit arrangement must pass through the constriction.

Circuit arrangement with shunt resistor

A semiconductor assembly is disclosed. One embodiment provides a first semiconductor and a second semiconductor, each having a first main connection and a second main connection arranged on opposite sides, and a carrier having a patterned metallization with a first section spaced apart from a second section. The first semiconductor is electrically connected to the first section by its second main connection, and the second semiconductor electrically connected to the second section by its second main connection. The first semiconductor chip first main connection and the second semiconductor chip first main connection are electrically connected to one another and for the connection of an external load or of an external supply voltage.

Semiconductor assembly

One embodiment provides a semiconductor module with an electrically insulating substrate. A conductor track is arranged on the substrate. A semiconductor chip and sleeve member are arranged on the substrate and electrically connected to the conductor track. The sleeve member includes a rim with a maximum inner diameter. The module further includes a contact element. The contact element includes a first end arranged within and electrically connected to the sleeve member, a second end providing an external contact of the module, and a section arranged between the first end and the second end. The section includes a maximum outer diameter that is larger than the maximum inner diameter of the rim. The contact element is in mechanical contact with the sleeve member such that the section between both ends of the contact element is arranged outside the sleeve member and borne on the rim of the sleeve member.

Power semiconductor module

A power semiconductor module () has power semiconductor components () arranged on a substrate (), at least one portion of which components is connected in parallel and arranged symmetrically on the substrate (). A second conduction plane () is provided for making contact with the power semiconductor components (). The second conduction plane is arranged in a manner electrically insulated from the substrate surface () above the surfaces of the power semiconductor components () that are remote from the substrate surface ().

A current/temperature measurement method using parasitic components in an electronic power circuit is disclosed. The measured values derived from these parasitic components with inadequate precision are first of all compensated for, in terms of their current/temperature or voltage dependence, during the production process. The evaluation which takes place during operation involves compensating for the temperature or current dependence of the sensor components using two measurements which are linearly independent of one another and appropriate arithmetic operations in an evaluation unit.

Method and apparatus for current and temperature measurement in an electronic power circuit

Device for actuating a plurality of actuators () in a transportation device, which has a plurality of output stages () and a control circuit for actuating the output stages (), the output stages () each connecting through the current in order to activate the actuators () and each output stage () being connected in electrically conductive fashion to an actuator (). A plurality of output stages () is additionally connected to in each case, one further actuator () by the control circuit. The control circuit is actuated in such a way that an output stage () can actuate either the first or the further actuator () with the output stages () being interconnected to one another and/or to the actuators () in the manner of a matrix so that a plurality of row lines () and a plurality of column lines (), at whose points of intersection () the actuators () are arranged, are provided.

Device for actuating a plurality of electric motors

An electronic power module includes at least one electronic power device, a DCB ceramic substrate, a heat sink and at least one additional thermal capacitance. The electronic power devices are connected by a sintered layer on their underside to an upper copper layer of the DCB ceramic substrate. The upper copper layer of the DCB ceramic substrate is structured into copper conductor tracks for electrically contacting the power devices. The lower copper layer of the DCB ceramic substrate is connected by a sintered layer to a heat sink. The upper sides of the power devices are connected by a sintered layer to an addition thermal capacitance.

Growing community of inventors

Soest, Germany

Markus Thoben