Nxp B.v.

Stmicroelectronics (Crolles 2) Sas

Stmicroelectronics S.a.

Stmicroelectronics (Rousset) Sas

Markus Müller

Philippe Coronel

Pascal Besson

Alexandre Mondot

Arnaud Pouydebasque

Grógory Bidal

Benjamin Dumont

A method of fabricating a device, including the steps of forming a first silicon oxide layer within a first region of the device and a second silicon oxide layer within a second region of the device, implanting doping ions of a first type into the first region, implanting doping ions of a second type into the second region, and etching the first and second regions for a determined duration such that the first silicon oxide layer is removed and at least a part of the second silicon oxide layer remains.

Selective removal of a silicon oxide layer

A method of forming a field effect transistor comprising a gate formed on an insulating layer, the gate having, in a zone in contact with the insulating layer, a semiconducting central zone and lateral zones in the length of the gate, the method comprising forming a gate comprising a portion of insulating layer, a portion of semiconducting layer formed over the insulating layer, and a portion of mask layer formed over the semiconducting layer; performing an etching of the portion of the mask layer such that only a portion in the center of the gate remains; and reacting the semiconducting gate with a metal deposited over the gate.

Method of fabricating a transistor with semiconductor gate combined locally with a metal

A process for forming a wire portion in an integrated electronic circuit includes epitaxially growing the wire portion on a side surface of a seed layer portion (). Cross-sectional dimensions of the wire portion correspond to a thickness of the seed layer portion and to a duration of the growing step. The seed layer portion is then selectively removed while the wire portion is retained fixedly on the circuit. Afterwards, heating of the circuit can cause the wire portion becoming rounded in cross-section. The wire portion obtained may be about 10 nanometers in diameter. It may be used for forming a channel of a MOS transistor devoid of short channel effect.

Process for forming a wire portion in an integrated electronic circuit

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Brussels, Belgium

Markus Müller