Infineon Technologies Ag

Infineon Technologies Austria Ag

Markus Menath

Matthias Stecher

Hermann Wendt

Andreas Zankl

Alexander Heinrich

Thomas Fischer

Michael Roesner

Gudrun Stranzl

Gunther Mackh

Michaela Braun

Hannes Eder

Katharina Umminger

Reinhard Hess

Gabriel Maier

Alfons Dehe

Dominic Maier

Thomas Kilger

Werner Robl

Daniel Porwol

Berthold Schuderer

Juergen Wagner

Tarek Lutz

Franz Xaver Muehlbauer

Anja Reitmeier

Anja Gisslbl

A semiconductor device includes a silicon carbide layer, a metal carbide layer arranged over the silicon carbide layer, and a solder layer arranged over and in contact with the metal carbide layer.

Silicon carbide devices and methods for manufacturing the same

A method of processing silicon carbide containing crystalline substrate is provided. The method includes pyrolyzing a surface of the silicon carbide containing crystalline substrate to produce a silicon and carbon containing debris layer over the silicon carbide containing crystalline substrate, and removing the silicon and carbon containing debris layer, wherein the pyrolyzing and the removing is repeated at least once.

Method of processing a silicon carbide containing crystalline substrate, silicon carbide chip, and processing chamber

In one embodiment, a wafer includes a number of die areas each including a semiconductor device and dedicated to become a separate die. The die areas are disposed on a first face of the wafer and wherein adjacent die areas are distanced from one another. A first trench and a second trench are formed on the first face between adjacent die areas. The first trench and the second trench are spaced apart from one another by a ridge. A third trench is disposed above the ridge on a second face of the wafer.

Method for use in manufacturing a semiconductor device die

A method for producing a rounded conductor line of a semiconductor component is disclosed. In that method, a partially completed semiconductor component is provided. The partially completed semiconductor component has a bottom side and a top side spaced distant from the bottom side in a vertical direction. Also provided is an etchant. On the top side, a dielectric layer is arranged. The dielectric layer has at least two different regions that show different etch rates when they are etched with the etchant. Subsequently, a trench is formed in the dielectric layer such that the trench intersects each of the different regions. Then, the trench is widened by etching the trench with the etchant at different etch rates. By filling the widened trench with an electrically conductive material, a conductor line is formed.

Method for producing a conductor line

A method of producing a chip package is described. A plurality of chips is provided on a first wafer. Each chip has a cavity which opens to a first main face of the chip. The cavities are filled or covered temporarily. The chips are then singulated. The singulated chips are embedded in an encapsulation material, and then the cavities are re-exposed.

Chip package and a method of producing the same

A method for manufacturing an electronic device and an electronic device are disclosed. In an embodiment the method comprises forming an opening in an isolation layer, isotropically etching the opening thereby forming an extended opening with curved sidewalls, and forming a conductive material in the opening.

Transformer comprising a rounded coil

A method for manufacturing a chip arrangement is provided, the method including: forming a hole in a carrier including at least one chip, wherein forming a hole in the carrier includes: selectively removing carrier material, thereby forming a cavity in the carrier, forming passivation material over one or more cavity walls exposed by the selective removal of the carrier material; selectively removing a portion of the passivation material and further carrier material exposed by the selective removal of the passivation material, wherein a further portion of the passivation material remains over at least one cavity side wall; the method further including subsequently forming a layer over the further portion of passivation material remaining over the at least one cavity side wall.

Methods for manufacturing a chip arrangement, methods for manufacturing a chip package, a chip package and chip arrangements

In various embodiments, a method for processing a wafer may include: providing a wafer having at least one die region and at least one metallization disposed over the at least one die region; covering the at least one metallization with a protecting layer; plasma etching the wafer to form at least one die.

Method for processing a wafer and method for dicing a wafer

Method for fabricating a coil by way of a rounded trench

A semiconductor component has integrated a coreless transformer with a first connection contact, a second connection contact, an electrically conductive spiral first coil, an electrically conductive first ring, and an electrically conductive second ring. The electrically conductive spiral first coil is electrically connected between the first connection contact and the second connection contact. The electrically conductive first ring surrounds the first coil and one or both of the first connection contact and the second connection contact. The electrically conductive second ring is arranged between the first coil and the first ring, electrically connected to the first coil, and surrounds the first coil and one or both of the first connection contact and the second connection contact.

Semiconductor component with coreless transformer

A method includes structuring a semiconductor substrate to produce a number semiconductor chips. Each of the semiconductor chips includes a first main face and a number of side faces. An indentation is formed at a transition between the first main face and the side faces.

Method for fabricating a semiconductor chip and semiconductor chip

An apparatus for determining physical properties of a mask blank. The apparatus includes, for example, an illumination device for radiating a predetermined light laterally into the mask blank, a detection device opposite the illumination device for detecting the light which has been scattered and/or runs through the mask blank, and an evaluation device for determining predetermined properties of the mask blank from the light which has been scattered and/or has run through the mask blank and has been detected in the detection device. The present invention likewise provides a method for determining physical properties of a mask blank.

Growing community of inventors

Wuppertal, Germany

Markus Menath