Infineon Technologies Ag

Markus Müllauer

Derek Bernardon

Peter Mahrla

Roman Riederer

In a method for recording critical parameters for circuit sections of electronic appliances, the critical parameters are represented by status bits in a status register (). As a result of a change of state for a critical parameter, the associated status bit assumes a new value and retains this value up until a read operation.

Debug mode in power supply units for electronic appliances

A circuit arrangement for protection against electrostatic discharge for a field-effect transistor is disclosed. The arrangement includes a first and a second controllable path each having a control terminal. The control terminals of the controllable paths are coupled to a source terminal of the field-effect transistor. A first terminal of the first controllable path is connected to a control terminal of the transistor, and a first terminal of the second controllable path is connected to a bulk terminal of the unipolar transistor. Second terminals of the controllable paths are connected to the drain terminal. A voltage regulating device includes the circuit arrangement and a comparator configured to generate a control signal in a manner dependent on a difference between two signals applied thereto. A control output of the comparator is coupled to the control terminal of the transistor.

Circuit arrangement for protection against electrostatic discharge and voltage regulating device having a circuit arrangement

A circuit for amplifying an input voltage (VIN) into an output voltage (VOUT) with an overall gain factor, which is a product of a first gain factor (S) and a second gain factor (R), comprises means for generating an intermediate signal (I) from the input voltage (VIN) and the first gain factor (S) and means for generating the output voltage (VOUT) from the intermediate signal (I) and the second gain factor (R). The first gain factor (S) and the second gain factor (R) have opposite temperature dependencies.

Temperature-stabilized amplifier circuit

A circuit for driving an external FET has a differential amplification stage supplied by a first and second operating potential. An output load resistor is included in a current flow path in which the current is controlled by the voltage between two input terminals of the amplification stage. The current is substantially independent of variations of the first or second operating potentials. The output load resistor is connected between the gate and the source of the external FET

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Friesach, Austria

Markus Müllauer