Infineon Technologies Ag

Infineon Technologies Austria Ag

Markus Hammer

Uwe Wahl

Andreas Strasser

Guenther Ruhl

Bernhard Knott

Stefan Willkofer

Jens-Peer Stengl

Michael Melzl

Reinhard Goellner

Doerthe Groteloh

Regina Kainzbauer

Günther Ruhl

A semiconductor device, a method of manufacturing a semiconductor device and a method for transmitting a signal are disclosed. In accordance with an embodiment of the present invention, the semiconductor device comprises a first semiconductor chip comprising a first coil, a second semiconductor chip comprising a second coil inductively coupled to the first coil, and an isolating intermediate layer between the first semiconductor chip and the second semiconductor chip.

Semiconductor device and method of manufacture thereof

The disclosed invention provides a structure and method for providing a high lateral voltage resistance between the electrical networks, sharing a lateral plane, of conductive elements (e.g., having different high voltage potentials) comprising a coupler. In one embodiment, an integrated coupler providing a high lateral voltage resistance comprises a primary conductive element and a secondary conductive element. An isolating material is laterally configured between the electrical network of the primary conductive element and an electrical network of the secondary conductive element. The isolating material may comprise a low-k dielectric layer and prevents any lateral barrier layers (e.g., etch stop layers, diffusion barrier layers, etc.) from extending between the first conductive element and the electrical network of the second conductive element. The structure therefore provides a galvanically isolated integrated coupler which avoids electrical shorting between circuits (e.g., at barrier layers) resulting in an improved high voltage resistance.

High voltage resistance coupling structure

A vehicle lighting arrangement comprising a luminous device, a luminous device driver circuit, a sensor and a nonvolatile memory, wherein the luminous device driver circuit is designed to drive the luminous device during luminous device driving such that the luminous device emits light, wherein the sensor is designed to detect a sensor state of the luminous device, and wherein the vehicle lighting arrangement is designed to read in a sensor state of the luminous device detected by the sensor and to write the read-in sensor state to the nonvolatile memory.

Vehicle lighting arrangement

An integrated circuit includes a substrate. A surface region of the substrate includes a contact pad region. A passivation layer stack includes at least one passivation layer. The passivation layer stack is formed over the surface region and adjacent to the contact pad region. An upper portion of the passivation layer stack is removed in, in a portion of the passivation layer stack proximate the contact pad region.

Method of processing a contact pad, method of manufacturing a contact pad, and integrated circuit element

An integrated component includes a semiconductor substrate; at least one interconnect applied on the semiconductor substrate; an insulating layer applied on the at least one interconnect; and at least one opening through the insulating layer which interrupts the at least one interconnect into a first section and a second section.

System for separation of an electrically conductive connection

In a method of processing a contact pad, a passivation layer stack including at least one passivation layer is formed on at least an upper surface of a contact pad region. A first portion of the passivation layer stack is removed from above the contact pad region, wherein a second portion of the passivation layer remains on the contact pad region and covers the contact pad region. An adhesion layer is formed on the passivation layer stack. The adhesion layer is patterned, wherein the adhesion layer is removed from above the contact pad region. Furthermore, the second portion of the passivation layer stack is removed.

A method for fabricating an integrated semiconductor configuration includes generating a polycrystalline layer at a surface of a base layer and doping the polycrystalline layer. An oxide layer is generated at the polycrystalline layer by rapid thermal oxidation so that the polycrystalline layer can be precisely structured. The method further includes structuring the main layer and performing the thermal oxidation at temperatures above 900&#xb0; C. for less than 65 seconds. The method also includes carrying out the thermal oxidation as an initial processing step (after generating the main layer) at a temperature of at least substantially equal to the temperature for generating the main layer. A related semiconductor configuration and memory unit are also provided.

Method for fabricating an integrated semiconductor configuration with the aid of thermal oxidation, related semiconductor configuration, and related memory unit

Growing community of inventors

Pielenhofen, Germany

Markus Hammer