Qualcomm Incorporated

Other

Marko Harry Koski

Charles D Tuten

Gordon P Lee

Ajay Kumar Kosaraju

Todd Robert Sutton

Joseph Duncan

Guolei Yu

Zdravko Lukic

Troy L Stockstad

Chris M Rosolowski

Ravi Jenkal

Anish Muttreja

Ken Tsz Kin Mok

Orlando Santiago

Rashed Hoque

Hector Freires Corleto

Edgar Marti-Arbona

Aniruddha Bashar

Yi-Cheng Wan

Visu Vaithiyanathan Swaminathan

Jackson King

An apparatus is disclosed for harvesting ringing energy. In an example aspect, the apparatus includes a bootstrap circuit. The bootstrap circuit includes a bootstrap capacitor and a bootstrap switch. The bootstrap switch includes a first terminal configured to accept an input voltage. The bootstrap switch also includes a second terminal coupled to the bootstrap capacitor. The bootstrap switch additionally includes a body diode comprising an anode coupled to the first terminal and a cathode coupled to the second terminal. The bootstrap switch is configured to be in an open state to charge the bootstrap capacitor via the body diode. The bootstrap switch is also configured to provide a voltage at the second terminal of the bootstrap switch. The voltage is greater than an average of the input voltage.

Harvesting ringing energy using a bootstrap circuit

A method and apparatuses for power regulation using an extended current limit are disclosed. The power regulator detects an occurrence of an output current of the regulator exceeding a first current limit, triggers an extended current limit timer based on the detected occurrence, regulates the output current according to a second current limit higher than the first current limit based on a duration of the extended current limit timer, and regulates the output current according to the first current limit based on an expiration of the duration of the extended current limit timer.

Methods and apparatuses for extended current limit for power regulation

Exemplary embodiments are related to a buck regulator. A buck regulator may include an inductor selectively coupled to an output and a power supply. The regulator may also include a controller configured to detect an over-current event if an amount of current flowing from the power supply to the inductor is equal to or greater than a current threshold and detect a low-voltage event if a voltage at the output is less than or equal to a reference voltage. Further, in response to the over-current event and the low-voltage event, the controller may be configured to prevent current from flowing from the power supply to the inductor until substantially all energy stored by the inductor has been dissipated.

Voltage regulator over-current protection

A voltage regulator circuit using predictively precharged voltage rails is generally disclosed. For example, the voltage regulator circuit may include a main switching regulator configured to provide a target voltage, the main switching regulator having a first voltage node, a precharge switching regulator configured to provide a precharge voltage, the precharge switching regulator having a second voltage node, the precharge voltage based on a difference between the target voltage and a next target voltage to be provided by the main switching regulator, and a precharge switch circuit configured to selectively couple the second voltage node to an output voltage node based upon a transition from the target voltage to the next target voltage.

Methods and apparatuses for voltage regulation using predictively charged precharge rails

An apparatus is disclosed that includes a voltage-controlled delay generator. In an example aspect, the apparatus includes voltage-controlled timing circuitry, duty cycle detection circuitry, and output circuitry. The voltage-controlled timing circuitry is configured to receive a control voltage. The voltage-controlled timing circuitry includes a current source, a control transistor, and a capacitor that are configured to produce a voltage indicator based on the control voltage. The duty cycle detection circuitry is coupled to the voltage-controlled timing circuitry. The duty cycle detection circuitry is configured to detect the voltage indicator and provide a duty cycle indicator based on the voltage indicator. The output circuitry is coupled to the duty cycle detection circuitry and is configured to generate a duty signal based on the duty cycle indicator.

Voltage-controlled delay generator

The present disclosure describes aspects of power regulation with charge pumps. In some aspects, an integrated circuit (IC) includes multiple processor cores and a power input connected to an internal power rail of the IC. The IC may also comprise embedded charge pumps coupled between the internal power rail of the IC and respective input power rails of the multiple processor cores. Capacitors of the embedded charge pumps may be implemented with on-die capacitors suitable for integration with a die of the circuit to facilitate the embedding of the charge pumps. Alternately or additionally, separate input power rails of the processor cores and the embedded charge pumps may enable more-efficient power regulation or power management on a per-processor core basis, such as when a processor core is throttled or idled to reduce power consumption.

Power regulation with charge pumps

The present disclosure provides a duty locked loop circuit that includes a switch network including a first electronic switch device controlled by a first control signal that is based on a first input signal and a second electronic switch device controlled by a second control signal that is based on a second input signal. The duty locked loop circuit includes an integrator circuit electrically connected to the switch network. The integrator circuit is configured to generate an output voltage proportional to an integral of a difference between a first duty cycle of the first input signal and a second duty cycle of the second input signal. The duty locked loop circuit includes an output circuit configured to generate an output signal having an output duty cycle that is based on the output voltage.

Duty locked loop circuit

The present disclosure describes aspects of voltage settling detection for switching regulators. In some aspects, an integrated circuit for controlling a switching regulator includes a modulator having an output coupled to switch drive circuitry of the switching regulator. A digital-to-analog converter (DAC) has a first output coupled to an input of the modulator and a second output configured to indicate when a digital-to-analog conversion is complete. A voltage settling detector is configured to receive, from the second output of DAC, an indication that the digital-to-analog conversion is complete and detect a signal transition at the output of the modulator. Based on the indication and the signal transition, the voltage settling detector can provide a status indication for the switching regulator. By so doing, the voltage settling detector may indicate that an output voltage of the switching regulator is proximate a target output voltage level set by the DAC.

Voltage settling detection for switching regulators

Disclosed is a voltage regulator circuit configured to selectively operate the voltage regulator circuit in a first mode of operation and a second mode of operation. The voltage regulator can change operation of the voltage regulator circuit between the first mode of operation to the second mode of operation in response to a change in a sensed load condition of the voltage regulator circuit. The voltage regulator can change operation from the second mode of operation to the first mode of operation in response to the sensed load condition changing from the second load condition to the first load condition, but only when the sensed load condition has not changed in a given direction between the first load condition and the second load condition for at least a predetermined period of time T.

Voltage regulator having auto mode optimized for load profiles

A fast transient switching voltage regulator includes a reference signal generator to provide a reference in a feedback path to control switching. The reference signal generator is operative to incorporate a voltage offset into the reference signal timed with the control pulses used to control the switching. The voltage offset moves the reference signal out of the way of pulses introduced in the feedback path due to capacitance ESL in the output capacitor of the switching voltage regulator.

Circuit and method to compensate for equivalent series inductance (ESL) effects in a buck regulator

Exemplary embodiments are related to generating an error correction voltage and/or a compensation voltage based upon pulse-width modulation information. A device may include a pulse-width modulator configured to receive a first input voltage and convey a modulated output voltage. The device may also include a filtering unit including at least one filter configured to receive the modulated output voltage, generate at least one of an error correction voltage and a compensation voltage, and convey a second input voltage to the pulse-width modulator based on at least one of the error correction voltage and a compensation voltage.

Transfer function generation based on pulse-width modulation information

Exemplary embodiments are related to a switching voltage regulator. A device may include a first transistor having a gate configured to receive a first signal and a second transistor having a gate configured to receive a second signal. The device may also include a controller configured to measure at least one of a difference between a rising edge of the first signal and an associated rising edge of the second signal and a difference between a falling edge of the first signal and an associated falling edge of the second signal. The controller may also be configured to delay one of the first signal and the second signal if the rising edge of the first signal occurs before or after the associated rising edge of the second signal or if the falling edge of the first signal occurs before or after the associated falling edge of the second signal.

Adaptive switching voltage regulator

A power controller having good transient performance and including a voltage regulator and one or more (K) transient recovery circuits is described. The voltage regulator receives a supply voltage and generates a regulator output signal used to generate K output voltages for K loads. Each transient recovery circuit detects for transients in a respective output voltage and corrects the detected transients. In one design, the transient recovery circuit compares the output voltage against a low threshold voltage, detects a low transient when the output voltage is below the low threshold voltage, and couples the output voltage to a high voltage to correct the low transient. Alternatively or additionally, the transient recovery circuit compares the output voltage against a high threshold voltage, detects a high transient when the output voltage is above the high threshold voltage, and couples the output voltage to a low voltage to correct the high transient.

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Scottsdale, AZ, United States of America

Marko Harry Koski