Samsung Electronics Co., Ltd.

Motorola Corporation

Mark Yosefin

Joseph Shor

Yachin Afek

Dan M Bruck

A method of capturing an image of a scene using an image capture device having an array of pixels, wherein the array of pixels includes pixels of different colors, includes, for a first duration, capturing a first portion of the scene with a first plurality of the pixels of a first color, and for a second duration, capturing a second portion of the scene with a second plurality of the pixels of a second color. The first and second durations are different and the first and second durations are chosen, at least in part, to improve the signal to noise ratio of the image capture device.

Variable exposure for color image sensor

In a circuit (10), a first N-FET (N1) and a second N-FET (N2) are coupled serially between a node (15) and ground (93). The circuit (10) accommodates a first excursion (85) of a first signal (IN) at the gates of the first N-FET (N1) which is higher than the maximum allowable drain-source voltage for N-FETs. The voltage of a second signal (OUT) between the node (15) and ground (93) is distributed across the first and the second N-FETs (N1, N2). The gate voltage of the second N-FET (N2) is not constant, but controlled by a control circuit (20) receiving signals the first signal (IN) and, optionally, the second signal (OUT). With the variation of the gate voltage for the second N-FET (N2), the size of both transistors (N1, N2) can be reduced and the fall time (T.sub.F) of the second signal (OUT) can be reduced.

Circuit with hot-electron protection and method

An I/O circuit whose output receives a voltage V.sub.PAD which is temporarily higher than a critical voltage V.sub.DS MAX &gt;V.sub.DS 1 across drain and source of a conducting first N-FET (110, N1) acting as a pull-down device. The first N-FET is protected against hotelectron induced degradation by a serially coupled second N-FET (130, N3). A variable drain-source voltage V.sub.DS 3 is added to V.sub.DS 1. A comparator (150) compares the received voltage V.sub.PAD to a supply voltage V.sub.CC and pulls a gate (G) of the second N-FET (N3) to V.sub.PAD or to V.sub.CC. The conductivity of the second N-FET (N3) is thereby changed so that VPAD is distributed among V.sub.DS 1 and V.sub.DS 2. The comparator (150) conveniently comprises two P-FETs (P1, P2, 160, 170).

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Jerusalem, Israel

Mark Yosefin