Qualcomm Incorporated

Mark Wayland

Thomas Clark Bryan

Michael J Brunolli

Yu Huang

Timothy Mowry Hollis

Kenneth Dubowski

Michael Joseph Brunolli

Systems and methods for equalizing an output driver circuit based on information from calibration of the output impedance of the driver circuit are disclosed. Settings that result from the calibration are referred to as calibration codes. The output driver circuit includes multiple pull-up elements that are enabled or disabled to produce a desired output impedance when the output is high and multiple pull-down elements that are enabled or disabled to produce the desired output impedance when the output is low. The number of pull-up elements that are enabled and the number of pull-down elements that are enabled is set by calibration. The results of the calibration (i.e., the number of enabled elements for the pull-up and the number of enabled elements for the pull-down) are used to set controls for an amount of pre-emphasis and/or to set controls for output slew rates.

Output driver circuit with auto-equalization based on drive strength calibration

A driver circuit includes an output driver including a plurality of output driver legs. The driver circuit further includes a duty cycle adjuster configured to adjust a duty cycle of a signal provided to the output driver. The driver circuit further includes an isolation module configured to isolate at least one output driver leg of the output driver legs from remaining output driver legs of the output driver legs. The driver circuit further includes a duty cycle monitor configured to monitor an output of the at least one output driver leg when the at least one output driver leg is isolated from the remaining output driver legs, and to provide the monitored output to the duty cycle adjuster.

Load isolation for pad signal monitoring

An output driver configured to drive an output node includes a pull-down section having a plurality of legs and a pull-up section having a plurality of pull-up legs. Each leg and pull-up leg includes a data path and a calibration path. The data paths in the pull-down section are configured to conduct to ground responsive to an assertion of a complement data output signal whereas the data paths in the pull-up section are configured to conduct to a power supply node responsive to a de-assertion of the complement data output signal.

Calibrated output driver with enhanced reliability and density

A control circuit generates data signals and configuration commands that are provided to an interface circuit. The interface circuit includes a configuration circuit that generates configuration signals according to the configuration commands and a drive component that generates interface signals according to the data signals. The interface signals are generated with a drive characteristic determined according to the configuration signals applied to configuration devices that selectively activate a configuration of drive devices. A diagnostic circuit is coupled to the control circuit and the interface circuit and is configured to receive a test state indication and acquire a corresponding portion of the configuration signals. The diagnostic circuit compares the test state indication and the portion of the configuration signals to diagnose a stuck-at fault condition within a faulty configuration circuit and propagate a fault indication to the control circuit.

Cascaded test chain for stuck-at fault verification

An output driver for driving a data output signal through an output pad includes a plurality of calibration paths to calibrate the impedance of the output pad. Depending upon the desired impedance, various ones of the calibration paths are selectively coupled to the output pad. Each selected calibration path adds a capacitive load to a data node, which affects the slew rate for the data output signal. To adjust the capacitive load on the data node in light of the calibration path selections, the output driver includes a plurality of selectable capacitors corresponding to the plurality of calibration paths. If a calibration path is not selected to couple to the output pad, the corresponding selectable capacitor capacitively loads the data node.

Output driver with slew rate calibration

A receiver is disclosed. The receiver includes an amplifier and a bias circuit configured to provide a bias current to the amplifier. The bias circuit is self biasing. The bias circuit is also configured to adjust the bias current using positive feedback from the amplifier.

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San Diego, CA, United States of America

Mark Wayland