Siemens Aktiengesellschaft

Mark W Clark

Wolfgang Siegmund

Dagmar Lautenbach-Lampe

Robert Hoffmann

Anton Weber

Michael Dorfle

Hans-Dieter Wunderlich

Erich Sonnenschein

Johannes Wollenweber

Winfried Stelzel

The method enables an improved and faster error recognition of software errors in a processor or processor system in which programs subject information received from other programs to an error check, particularly to a plausibility check, and, given acquisition of error statuses, output a corresponding error message to the operating system. This error message contains an indication of the other program generating the faulty information and is stored in a respective error message table. The operating system thus learns of programs suspected of working in a faulty way from other programs collaborating with these programs, so that program errors can be recognized and localized significantly faster.

Method for error recognition in a processor system

The specified monitoring program enables the recognition of endless loops or blocked processes in a computer system, in particular in a telecommunication switching system. When such software errors are recognized, error indices can be collected and stored, which enable a later error analysis and removal. The endless loops or, respectively, blocked processes can also be reset in a suitable way, so that no negative effects on other processes result.

Monitoring method for recognizing endless loops and blocked processes in a computer system using task state comparisons

In a telecommunication network of ATM exchanges (V1, Vn) via which information transmitted in the STM mode can also be switched, error-detecting code words (EDCE) are respectively derived at an exchange input (EVi) from the content of information parts (PL) of a defined plurality of ATM cells in order to monitor the through-connections through an exchange. These error-detecting code words (EDCE) are transmitted to an exchange output in transition monitoring cells (DUZ) together with the plurality of information parts (PL) and are compared thereat to a newly formed error-detecting code word.

Method for monitoring virtual connections within a digital

Start-up system of a computer system

Communication system having a multiprocessor system serving the purpose of central control. Multiprocessor systems are used in communication systems for the purpose of central control. Care must thereby be exercised to ensure that the jobs/messages arriving from a periphery according to the FIFO principle are in turn deposited in the original sequence after being handled by processes being executed on the processors. A coordination procedure required for this purpose thereby uses a holding table. The logical sequence of jobs/messages is thus assured during the processing in the multiprocessor system.

Communication system having a multiprocessor system serving the purpose

A method of distributing the processing load among components of a multiprocessor system, such as a switching system, avoids having two different processors (CP9) simultaneously handling different jobs for the same connection. A plurality of central processors (BP,CP,IOC) and a central main memory (CMY) are connected in parallel to a central bus system (B:CMY). As soon as they are free, each processor fetches a job for handling a switching task from a job registering means (AR), and then fetches data about the appertaining connections from the main memory (CMY). Each processor stores a protective code corresponding to its address at a location associated with the job as soon as and as long as it is handling the job. However, it does not store its code in case a different processor (CP9) has already entered its protective code there. Every central processor has its own job memory (AS). When a processor finds the protective code of another processor associated with the job data, it forwards its own job to this other processor by entering this job into the job memory (AS) of the other processor.

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Munich, Germany

Mark W Clark