Breakingpoint Systems, Inc.

Mark Veteikis

Michael Moriarty

Kristopher Len Raney

Dennis James Cox

Brent Cook

Jonathan Glenn Stroud

Ryan S Clifton

A method for enabling virtual data loopback in a computing system may include forwarding a data packet from a first device to a second device; the second device identifying from the data packet egress interface information indicating a first interface for forwarding the data packet out of the computing system; based on the first interface identified from the egress interface information, automatically determining a second interface to the first interface; inserting into the data packet ingress interface information that indicates the second interface; forwarding the data packet, including the ingress interface information, back to the first device; and the first device identifying the ingress interface information indicating the second interface; such that the data packet is looped back to the first device without being communicated via the first or second interface, and such that from the perspective of the first device the data packet was received via the second interface.

Virtual data loopback and/or data capture in a computing system

An automated method for analyzing a plurality of network messages received by a network testing device is disclosed. The method may comprise, during a current window of time, receiving from a target network device a network message associated with an original network message determining a latency value for the received network message comparing the determined latency value with the threshold latency value; and incrementing either the first counter or the second counter based on the comparison of the determined latency value with a threshold latency value. The method may further comprise, at the end of the current window of time, storing the first and second counter values resulting from the analysis of the plurality of original network messages.

Dynamic latency analysis system

A method for managing the capture of packets in a computing system comprises maintaining a buffer tail pointer in a memory of an instruction executing device, receiving a series of packets at an instruction executing device, for each received packet prepending a header comprising a packet length and a packet pointer set to a current value of the buffer tail pointer, determining a next free memory location by adding the current value of the buffer tail pointer to the length of a previous packet identified by the buffer tail pointer, temporarily writing the packet and prepend header to the next free memory location in a circular packet buffer in a memory coupled to the instruction executing device, and setting the buffer tail pointer to the next free memory location.

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Austin, TX, United States of America

Mark Veteikis