Texas Instruments Corporation

Pharmacopeia Inc.

Mark V Wadsworth

Roland W Gooch

Sebastian R Borrello

William L McCardel

Glenn H Westphal

Malcolm John Bevan

Kirk D Peterson

Julie G Whitney

An array of bolometers suspended over a substrate by support arms located beneath the corresponding bolometer to allow maximum fill factor in the array.

High fill factor bolometer array

The speed performance of a resistive DAC can be improved by tailoring the selection switch size to the node location. For the simple case of a DAC used in a SAR-based ADC, the MSB code, which is activated during each SAR search, is the speed-limiting bit. Increasing the size of the switch on the node corresponding to the MSB will reduce the on-resistance of the FET and, therefore, the total resistance to ground from the node. The on-resistance can be changed markedly without substantially changing the total capacitance at the output node, since the sum of the parasitic from the remaining switches will far exceed the additional capacitance created by increasing the MSB FET.

Resistor string DAC with improved speed

A sensor (1400) with radiation detectors (1421-1422) with two or more bolometer or photoconductor elements and bias polarity switching of one element to emulate mechanical chopping of input radiation. This electronic chopping permits higher chopping frequencies than mechanical chopping for bolometers because the scene settling time does not limit electronic chopping. The detectors may be within a single vacuum integrated circuit package with separate narrow passband filters for chemical spectral analysis.

Bolometer autocalibration

A sensor with radiation detectors with two or more photoconductor elements and bias polarity switching of one element to emulate mechanical chopping of input radiation. This electronic chopping permits higher chopping frequencies than mechanical chopping for bolometers because the scene settling time does not limit electronic chopping. The detectors may be within a single vacuum integrated circuit package with separate narrow passband filters for chemical spectral analysis.

Electronic chopping

Bolometer array with active bolometers suspended over a substrate and a periphery of dummy bolometers making contact with the substrate, this allows bolometer formation under stress conditions.

Stress tolerant bolometer

A spectrometer (2500) including a detector integrated circuit (2501) which includes a linear array (2503) of 128 adjoining 2 by 10 superpixel bolometers in a package base (2530) and under an infrared transparent lid (2510) with a graded interference filter (2511). Filter (2511) has a rectangular shape and is a passband filter with a center wavelength which varies linearly along the direction of the long sides which is also the long direction of the linear array (2503) of bolometers. The center wavelength varies by a factor of about 2 over the length of the linear array (2503).

Bolometer array spectrometer

A preferred embodiment of this invention is a hybrid semiconductor imaging structure comprising a high speed signal conditioning substrate (e.g. Si 12) and an imaging substrate (e.g. HgCdTe 10) mounted on the conditioning substrate using an adhesive layer (e.g. epoxy 31). Infrared-sensitive time delay and integration CCD columns (14) charge coupled to sense nodes (e.g. diodes 16) are disposed in the imaging substrate. High speed signal processing channels (e.g. capacitive transimpedance amplifier 18, correlated double sampling circuit 20 and multiplexing shift register 22) are disposed in the conditioning substrate. The sense nodes are connected to the signal processing channels with low capacitance hybrid leads (e.g. Al 17).

Hybrid CCD imaging

A preferred embodiment of this invention is a hybrid semiconductor imaging structure comprising a high speed signal conditioning substrate (e.g. Si 12) and an imaging substrate (e.g. HgCdTe 10) mounted on the conditioning substrate using an adhesive layer (e.g. epoxy 31). Infrared-sensitive time delay and integration CCD columns (14) charge coupled to sense nodes (e.g. diodes 16) are disposed in the imaging substrate. High speed signal processing channels (e.g. capacitive transimpedance amplifier 18, congelated double sampling circuit 20 and multiplexing shift register 22) are disposed in the conditioning substrate. The sense nodes are connected to the signal processing channels with low capacitance hybrid leads (e.g AI 17).

Hybrid signal conditioning/infared imaging structure

A nondispersive infrared gas analyzer 10 for indicating the concentration of a selected gas uses a source of radiation 12 to supply radiation to a gas sample chamber 14. The gas chamber 14 functions as an optical channel for transmitting radiation from the source of radiation 12 to both a gas sensing detector 22 and reference detector 24. An inner surface 36 of the gas chamber 14 is an optical reflective surface for the chamber and has a constantly changing irregular profile to greatly enhance optical scattering of the radiation falling on it to provide an uniform disperse radiation output to the detectors 22, 24. Additionally, the source of radiation 12 is chosen to provide radiation which is defocused to further help in attaining homogenous radiation output from the gas sample chamber 14 to the detectors 22, 24.

Nondispersive infrared gas analyzer and gas sample chamber used therein

A hybrid semiconductor imaging structure comprising a high speed signal conditioning substrate (e.g. Si 12) and an imaging substrate (e.g. HgCdTe 10) mounted on the conditioning substrate using an adhesive layer (e.g. epoxy 31). Infrared-sensitive time delay and integration CCD columns (14) charge coupled to sense nodes (e.g. diodes 16) are disposed in the imaging substrate. High speed signal processing channels (e.g. capacitive transimpedance amplifier 18, correlated double sampling circuit 20 and multiplexing shift register 22) are disposed in the conditioning substrate. The sense nodes are connected to the signal processing channels with low capacitance hybrid leads (e.g A1 17).

A FET structure for use in narrow bandgap semiconductors comprising a narrow bandgap semiconductor substrate 24, an implanted source region 12 of a conductivity type opposite that of the substrate 24, an implanted drain region 12 of the same conductivity type as source region 12 and spaced from source region 12, a first diode guard ring 14 insulatively disposed on the substrate 24 and surrounding source region 12, a second diode guard ring 14 insulatively disposed on the substrate 24 and surrounding drain region 12, a gate region 16 insulatively disposed on the substrate 24 and surrounding the source and drain regions 12 and the first and second diode guard rings 14, an outer periphery transistor guard ring 18 insulatively disposed on the substrate 24 and surrounding the gate region 16 and a field plate region 20 insulatively disposed on the substrate 24 and surrounding the outer periphery transistor guard ring 18. Other devices, systems and methods are also disclosed.

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Richardson, TX, United States of America

Mark V Wadsworth