Endgate LLC

Mark V Faulkner

Clifford A Mohwinkel

Bert C Henderson

Edward Bryant Stoneham

Mark J Vaughan

Malkiat S Nijjar

Edward B Anderson

First and second spaced-apart planar circuit ground conductors are formed on a base substrate. Multiple stages of an amplifier each have a field effect transistor (FET) flip mounted onto the substrate. A signal-return line couples the sources of the FETs together and functions as a radio frequency (RF) grounds for the amplifier. Direct-current-blocking coplanar couplers couple the amplifier input and output to external circuits. A single voltage supply applies a bias voltage to the drains of the FETs. A source resistance device couples each source terminal to circuit ground. The source resistance devices may be formed of two series-connected resistors. The gate of each FET is coupled to one of the circuit ground conductors through one of the source resistors. The other source resistor thereby provides a gate-to-source voltage for biasing the FET. Alternative embodiments provide a community bias circuit in which signal-return lines of transistors conducting different signals are interconnected and coupled to the bias circuit ground.

Multiple stage self-biasing RF transistor circuit

Two or three conductor coplanar transmission lines and lossy coplanar resistive films are formed on a surface of a substrate. The resistive film dimensions and resistivity are selected to suppress various spurious electromagnetic modes within and around the substrate. The resistive films may be positioned along the outer edges of the transmission lines or between the transmission line conductors. The resistive film may have regular spaced openings for producing an average resistivity different than that of a continuous resistive film. In one embodiment, a signal conductor has a serpentine shape and resistive film elements are positioned between adjacent sections of the signal conductor. In another embodiment, interdigitated resistive film elements extend between transmission line conductors.

Coplanar microwave circuit having suppression of undesired modes

First and second slotlines are mounted on an electrically insulating substrate having a planar face with a connection region. Each slotline has first and second, spaced-apart coplanar conductors that extend into the connection region. A fifth, ground conductor, also mounted on the substrate face, is spaced from and coplanar with the first and second slotlines and has a proximal portion in the connection region. A chip circuit includes first and second field-effect transistors (FETs) flip mounted in the connection region to all five conductors. The gates of the FETs are connected to the first slotline for receiving an input signal. The drains are connected to the second slotline for outputting the signal amplified by the transistors. The sources of the FETs are connected to the fifth conductor. This general configuration can be modified for use as an amplifier, oscillator, frequency multiplier or mixer. The slotline may divide into parallel slotline portions for providing plural circuits in parallel with distributed impedance matching. A slotline may loop back from the connection region to provide a choice for impedance matching, and a portion of the fifth conductor may extend between slotline conductors to provide capacitive coupling.

Slotline-mounted flip chip structures

A means of connecting a plurality of essentially identical active devices is presented for the purpose of multifunction and multiple function operation. These devices, mounted on a chip, are flip-mounted to a circuit motherboard having large passive elements. A push-pull amplifier is presented as an example in which the multiple function operation is the combining of amplifiers whose active devices are on a single chip. The electromagnetic coupling, impedance matching and signal transmission are variously provided by the use of striplines, slotlines, coplanar waveguides, and a slotline converted into a coplanar waveguide.

Circuit structure having a matrix of active devices

Mixers assemblies including mixer cells, baluns, quadrature mixers and image reject mixers, etc. The mixer cell may contain CPW strip RF input and slot line strip LO input. LO signal return is provided through a flip-chip mounted to a mixer contact area and the CPW RF input is preferably coupled to the contact area through a distributed or flip-chip mounted capacitor. The use of two mixer cells in novel embodiments of quadrature and image reject mixers is disclosed. CPW to slot line power dividing baluns for use within and without such mixers are also disclosed.

Coplanar mixer assembly

An amplifier including an amplifying transistor flip-mounted on a coplanar waveguide pattern. Elements of stability and/or matching circuits are provided at least in part under the flip-mounted transistor to facilitate compact design and to improve component performance. A serial resistor-shunt inductor pair is provided with the resistor coupled proximate the transistor input and/or output and preferably configured within the CPW center conductor to provided more consistent component values. Embodiments of the present invention include a two-stage amplifier having a transmission segment formed between the two stages which serves to rotate the output impedance of the first stage toward a low noise match with the second stage and to rotate the input impedance of the second stage toward a high gain match with the first stage. The transmission segment may include a capacitive element for providing series capacitance and DC blocking. Adjustable impedance matching means are also taught.

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Boulder Creek, CA, United States of America

Mark V Faulkner