Stmicroelectronics (research & Development) Limited

Stmicroelectronics Gmbh

Mark Trimmer

Paul Elliott

A monitor includes a register configured to store at least two contexts and a context change value. A context selector is configured to select at least one of the two contexts for context monitoring. The selection is made dependent on whether the context change value matches a first part of a memory access address.

Hardware monitor with context switching and selection based on a data memory access and for raising an interrupt when a memory access address is outside of an address range of the selected context

An apparatus may include a delay line having a first delay value corresponding to first operating conditions of the apparatus and a second delay value corresponding to second operating conditions of the apparatus. A monitoring circuit may monitor a time taken for a first clock edge of a clock signal to propagate through the delay line. A determining circuit may determine whether operating conditions of the apparatus are acceptable in response to the time taken.

Detecting operating conditions

Corruption in a key stored in a memory is detected by reading a key from a key memory and determining if detection bits of the key read from the key memory correspond to an expected value. The expected value is a value of the detection bits of the key when the key is written to the key memory.

Detecting key corruption

There is provided a circuit and method for detecting a bad clock condition on a clock signal that includes sampling the value of the clock signal at a first plurality of time delays following a rising edge on the clock signal. This method also includes sampling the value of the clock signal at a second plurality of time delays following a falling edge on the clock signal.

Detection of bad clock conditions

This invention relates to a method of receiving a first potentially unreliable clock signal having a first frequency; receiving a second reliable clock signal having a second frequency; wherein the first frequency and the second frequency have an expected relationship; determining whether the first potentially unreliable clock signal has changed with respect to the second reliable clock signal by: determining an actual relationship between the first potentially unreliable frequency and the second reliable frequency; and generating an alarm signal if the actual relationship is different to the expected relationship.

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Bristol, United Kingdom

Mark Trimmer