Maschinenfabrik Reinhausen Gmbh

Mark Snook

Edward Shelton

Robert John Leedham

Matteo Vit

Stephen Parker

Robin Lyle

A method for voltage balancing series-connected power switching devices (IGBTs) each connected in parallel with a respective diverter having controllable impedance to controllably conduct current diverted from the associated power switching device, the method comprising the step of controlling each diverter to follow a series of at least two successively higher impedance states during an OFF period of the power switching devices. The series of impedance states for each diverter comprises a first impedance and then a second, higher impedance, the first impedance occurring in response to an indication of a start of the OFF period. The first impedance state preferably occurs during a tail current of the power switching device in parallel with the respective diverter and the second or later impedance state during a leakage current of that power switching device.

Voltage balancing in series-connected power switches

A power switch driver for driving a control terminal of a power switch to drive a load, the power switch driver having a negative feedback circuit to control current delivered to the control terminal. The negative feedback circuit has a current output circuit having a current source and a current sink and serving for providing the current of the control terminal and configured to receive an output current control signal to control a magnitude of the current provided by the current output circuit, a terminal voltage input circuit for receiving a voltage from the control terminal and to output an indication of the voltage, an amplifier coupled to the terminal voltage input circuit for amplifying the terminal voltage indication to generate an amplifier output, and a reference voltage input circuit for receiving a reference voltage, having at least one resistor, and coupled to a charge supply input of the amplifier.

Resistor emulation and gate boost

We describe a system for controlling very large numbers of power semiconductor switching devices () to switch in synchronization. The devices are high power devices, for example carrying hundreds of amps and/or voltages of the order of kilovolts. In outline the system comprises a coordinating control system (), which communicates with a plurality of switching device controllers () to control the devices into a plurality of states including a fully-off state, a saturated-on state, and at least one intermediate state between the fully-off and saturated-on states, synchronizing the devices in the at least one intermediate state during switching.

Switching control systems

The invention generally relates to methods and circuits for controlling switching of parallel coupled power semiconductor switching devices (), for example for use in a power converter. In an example, there is provided a circuit for controlling switching of parallel coupled power semiconductor switching devices (), the circuit comprising: a plurality of drive modules (), each said module for controlling a said power semiconductor switching device (); control circuitry to transmit switch command signals to the modules, each said switch command signal to trigger a said drive module to control a said power semiconductor switching device to switch state; and voltage isolation between the drive modules and the control circuitry, wherein each said drive module for controlling a said device comprises: timing circuitry () to compare a switching delay of the device and a reference delay, wherein said switching delay is a time interval between detecting a said switching command signal at the drive module and switching of the device in accordance with the detected switching command signal; and delay circuitry () to provide a controllable delay to delay a said triggering by a said switching command signal received at the module subsequent to the detected switching command signal, the delay circuitry configured to control the controllable delay according to a result of said comparison of said switching delay of the device, to thereby reduce a time difference between the reference delay and a said switching delay of the device switching in accordance with the subsequent switching command signal.

Synchronizing parallel power switches

Switching data is communicated in a power semiconductor switching device control system having a coordinating control system and a switching device controllers each coupled to the coordinating control system and each configured to control a respective power semiconductor switching device. Switching control data is formatted as one or more switching control data packets whose switching control data comprises data for controlling switching of the power semiconductor switching devices. The switching control data packets are sent from the coordinating control system to the switching device controllers. State data is detected, provided, and then formatted to represent states of the power semiconductor switching devices controlled in combination by the switching control data packets into acknowledgment data packets from the power semiconductor switching devices. The acknowledgment data packets are sent from the switching device controllers to the coordinating control system.

Switching control system signaling techniques

We describe a fault-tolerant power semiconductor switching device control system (), the control system comprising: a coordinating control system (); and a plurality of switching device controllers () each coupled to said coordinating control system and each configured to control a respective power semiconductor switching device (); wherein said coordinating control system is configured to send real time switching control data to said switching device controllers to control switching of said power semiconductor switching devices, and to receive real time acknowledgement data from said switching device controllers; wherein a said switching device controller is configured to receive said real time switching control data from said coordinating control system, to control a said power semiconductor switching device responsive to said real time switching control data, and to provide said real time acknowledgement data confirming said switching device control to said coordinating control system; and wherein said coordinating control system is further configured to control further switching of said power semiconductor switching devices responsive to said real time acknowledgement data.

Fault-tolerant power semiconductor switching device control system

We describe a controller () for controlling a power semiconductor switching device () into a selected one of a plurality of states, the states including a fully-off state, a saturated-on state, and at least one intermediate state. The switching device controller includes a voltage sense input () to sense a voltage on the device; a current sense input (current feedback) to sense a current passing through the device; a negative feedback control circuit () coupled to the sense inputs, a control output () to provide to the power semiconductor switching device a drive signal with a response dependent on one or more adjustable parameters; and a circuit controller () to control the adjustable parameters responsive to state command data, to control the switching device into a selected state, in particular by controlling an effective resistance of the device. Preferred intermediate states include an active low current state and an active low voltage state.

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Cambridge, United Kingdom

Mark Snook