Philips Electronics North America Corporation

Koninklijke Philips Corporation N.V.

Koninklijke Phillips Electronics N.v.

Philips North America LLC

Mark Simpson

Theodore James Letavic

Ted Letavic

John Petruzzello

Lilla Boroczky

Yasser Alsafadi

Satyendranath Mukherjee

Nicolas Wadih Chbat

Nilanjana Banerjee

Emil Arnold

James David Schaffer

Ye Xu

Andrew M Warwick

Richard H Egloff

Len-Yuan Tsou

Di-Son Kuo

A system and method for context-dependent data filtering for clinical decision support are disclosed. The system and method comprise determining values for characteristics of a present case, determining whether the present case is a special case based on the determined values, receiving input from a user verifying that the present case is the special case and saving the present case to a database containing a compilation of cases if the user verifies that the present case is the special case.

System and method for dynamic growing of a patient database with cases demonstrating special characteristics

A medical apparatus () assists clinicians, nurses or other users in choosing an intervention for the treatment of a patent suffering from an acute dynamic disease, e.g. sepsis. The medical apparatus is based on a method where a model of the disease is adapted or personalized to the patient. To ensure that the apparatus remains capable of predicting the health of the patient, the apparatus is continuously provided with new, more recent patient values and the model is continuously adapted to the new patient values. Since the medical apparatus is configured to be continuously adapted to current state of health, the apparatus is able to assist the user by generating disease management information, e.g. suggestions for medications, to an output device ().

Decision support system for acute dynamic diseases

A dual gate oxide high-voltage semiconductor device and method for forming the same are provided. Specifically, a device formed according to the present invention includes a semiconductor substrate, a buried oxide layer formed over the substrate, a silicon layer formed over the buried oxide layer, and a top oxide layer formed over the silicon layer. Adjacent an edge of the top oxide layer, a dual gate oxide is formed. The dual gate oxide allows both specific-on-resistance and breakdown voltage of the device to be optimized.

Dual gate oxide high-voltage semiconductor device and method for forming the same

Termination of a high voltage device is achieved by a plurality of discrete deposits of charge that are deposited in varying volumes and/or spacing laterally along a termination region. The manner in which the volumes and/or spacing varies also varies between different layers of a multiple layer device. In a preferred embodiment, the variations are such that the field strength is substantially constant along any horizontal or vertical cross section of the termination region.

Method and apparatus of terminating a high voltage solid state device

Dual gate oxide high-voltage semiconductor device

A hybrid semiconductor device is presented in which one or more diode regions are integrated into a transistor region. In a preferred embodiment the transistor region is a continuous (self-terminating) SOI LDMOS device in which are integrated one or more diode portions. Within the diode portions, since there is only one PN junction, the mechanism for breakdown failure due to bipolar turn-on is nonexistent. The diode regions are formed such that they have a lower breakdown voltage than the transistor region, and thus any transient voltage (or current) induced breakdown is necessarily contained in the diode regions. In a preferred embodiment, the breakdown voltage of the diode portions is lowered by narrowing their field plate length relative to the transistor portion of the device. This allows the device to survive any such breakdown without being destroyed, resulting in a more rugged and more reliable device.

HV-SOI LDMOS device with integrated diode to improve reliability and avalanche ruggedness

An improved method and structure for a transistor device with a lateral drift region and a conducting top field plate is presented. The method consists of decreasing the gate to drain capacitance by means of decreasing the portion of the field plate that is connected to the gate electrode, and hence the effective overlap of the gate with the drift region and drain. This results in decreased energy dissipation in switching the transistor, and more efficient operation. The rate of decrease of the gate to drain capacitance is even faster at higher drain voltages, inuring in significant energy efficiencies in high voltage applications.

SOI LDMOS structure with improved switching characteristics

A thin layer SOI high-voltage device in which the drift charge is depleted using a three-dimensional MOS capacitor structure. The drift region of the high-voltage semiconductor device is doped with a graded charge profile which increases from source-to-drain. The drift region is physically patterned to create a stripe geometry where individual SOI stripes. Each SOI stripe is individually circumscribed longitudinally by a dielectric layer wherein each dielectric layer is longitudinally circumscribed by field plates of a conducting multi-capacitor field plate layer which is electrically shorted to the substrate. The resultant structure is a thin drift-region stripe which is completely enclosed by a MOS field plate, resulting in three-dimensional depletion upon application of a bias voltage between the SOI stripe and its encapsulating field plates.

Thin-layer silicon-on-insulator (SOI) high-voltage device structure

A nonvolatile memory cell of the type having a single lateral transistor includes source and drain regions separated by a channel region. A floating gate is provided over at least the channel region and is separated therefrom by a gate oxide, with a control gate over the floating gate and insulated therefrom. By having the floating gate extend over substantially its entire length at a substantially constant distance from the surface of the device, and providing the floating gate and the surface with similarly-contoured corners adjacent ends of the source and drain regions alongside the channel region, the nonvolatile memory cell can be programmed and erased using lower voltages than those required by priorart devices.

Contoured nonvolatile memory cell

A lateral thin-film Silicon-On-Insulator (SOI) device includes a semiconductor substrate, a buried insulating layer on the substrate and a lateral transistor device in an SOI layer on the buried insulating layer and having a source region of a first conductivity type formed in a body region of a second conductivity type opposite to that of the first. A lateral drift region of a first conductivity type is provided adjacent the body region, and a drain region of the first conductivity type is provided laterally spaced apart from the body region by the drift region. A gate electrode is provided over a part of the body region in which a channel region is formed during operation and extending over a part of the lateral drift region adjacent the body region, with the gate electrode being at least substantially insulated from the body region and drift region by an insulation region. In order to provide improved breakdown voltage characteristics, a dielectric layer is provided over at least a part of the insulation region and the gate electrode, and a field plate electrode is provided over at least a part of the dielectric layer which is in direct contact with the insulation region, with the field plate electrode being connected to an electrode of the lateral transistor device.

Laterial thin-film silicon-on-insulator (SOI) device having a gate electrode and a field plate electrode

A lateral thin-film Silicon-On-Insulator (SOI) device includes a semiconductor substrate, a buried insulating layer on the substrate and a lateral transistor device in an SOI layer on the buried insulating layer and having a source region of a first conductivity type formed in a body region of a second conductivity type opposite to that of the first. A lateral drift region of a first conductivity type is provided adjacent the body region and forms a lightly-doped drain region, and a drain contact region of the first conductivity type is provided laterally spaced apart from the body region by the drift region. A gate electrode is provided over a part of the body region in which a channel region is formed during operation and extending over a part of the lateral drift region adjacent the body region, with the gate electrode being at least substantially insulated from the body region and drift region by a surface insulation region. In order to increase breakdown voltage and/or reduce &ldquo;on&rdquo; resistance, the lateral drift region is provided with at least a portion with a retrograde doping profile. This may advantageously be done by doping the semiconductor substrate, oxidizing the substrate to form the buried insulating layer, forming the SOI layer on the buried insulating layer, and thermally diffusing dopant from the buried insulating layer into the SOI layer.

Lateral thin-film silicon-on-insulator (SOI) device having a lateral drift region with a retrograde doping profile, and method of making such a device

The present invention is directed to an SOI LDMOS device having improved current handling capability, particularly in the source-follower mode, while maintaining an improved breakdown voltage capability. The improvement in current handling capability is achieved in a first embodiment by introducing an offset region between the source and thin drift regions. The offset region achieves an offset between the onset of the linear doping profile and the thinning of the SOI layer that results in the thin drift region. In a second embodiment a further increase in the current handling capability of an SOI device is achieved by fabricating an oxide layer over the offset region, with the thickness of the oxide layer layer varying up to about half the thickness of the oxide layer fabricated over the thin drift region.

High voltage thin film transistor with improved on-state characteristics and method for making same

A lateral thin-film Silicon-On-Insulator (SOI) device includes a semiconductor substrate, a buried insulating layer on the substrate and a lateral MOS device on the buried insulating layer and having a source region of a first conductivity type formed in a body region of a second conductivity type opposite to that of the first. A lateral drift region of a first conductivity type is provided adjacent the body region, and a drain region of the first conductivity type is provided laterally spaced apart from the body region by the drift region. A gate electrode is provided over a part of the body region in which a channel region is formed during operation and over at least a part of the lateral drift region adjacent the body region, with the gate electrode being insulated from the body region and drift region by an insulation region. In order to provide an optimum combination of low &ldquo;on&rdquo; resistance and high breakdown voltage, the lateral drift region is provided with a graded lateral doping profile, with two substantially linearly graded drift region portions having different doping profile slopes. Specifically, the slope of the doping profile is higher in the portion of the lateral drift region adjacent the drain region than in the portion of the lateral drift region adjacent the body region.

Lateral thin-film silicon-on-insulator (SOI) device having multiple doping profile slopes in the drift region

A method of making a semiconductor device such as a diode or MOSFET provided in a thin semiconductor film on a thin buried oxide is disclosed, in which the lateral semiconductor device structure includes at least two semiconductor regions separated by a lateral drift region. A top oxide insulating layer is provided over the thin semiconductor film and a conductive field plate is provided on the top oxide insulating layer. In order to provide enhanced device performance, a portion of the top oxide layer increases in thickness in a substantially continuous manner, while a portion of the lateral drift region beneath the top oxide layer decreases in thickness in a substantially continuous manner, both over a distance which is at least about a factor of five greater than the maximum thickness of the thin semiconductor film. This structure is achieved by a method including the steps of forming an oxidation mask including silicon nitride on the thin semiconductor film, and then patterning a portion of the oxidation mask with a series of sequential openings of different widths, a portion of the openings having a width less than the maximum thickness of the top oxide insulation layer. The thin semiconductor film is then oxidized using the oxidation mask to grow the top oxide insulation layer and lateral drift region portions which change in thickness.

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White Plains, NY, United States of America

Mark Simpson