Lecroy Corporation

Teledyne Lecroy, Inc.

Mark S Gorbics

Keith Michael Roberts

Richard L Sumner

In exemplary embodiments, a waveform processor system may update pixel state information as a function of current pixel state information (e.g., intensity, color) by comparing a randomized value to a set of predetermined threshold values that correspond to different permitted pixel states. In an illustrative example, each time a display screen is updated, the image may represent multiple (e.g., 2000) triggered sweeps of the waveform. For each triggered sweep, the waveform data is associated with specific pixels on the display screen. To determine how to update each pixel's state (e.g., brightness, color) for the next screen update, each waveform hit on a pixel may initiate a comparison between a randomized value (e.g., pseudorandom number) and the predetermined threshold value for the pixel's current pixel state. In some examples, the pixel state may be increased to the next level if the randomized value exceeds the predetermined threshold value.

Statistically-based display processing

Methods for processing waveforms may include decimating an over-sampled waveform by identifying samples for which the sample's position within a data period indicates that is closest to a selected time within a data period. In some example applications, the selected time may be determined as a preferred time to sample the waveform within a data period. In an illustrative example, a sequence of samples representing an over-sampled waveform may be reduced by identifying a sample in each data period that is closest in time to the selected time. In another illustrative example, a sample within each data period may be identified if it falls within a range that is a function of the selected time within the data period and an integral ratio of a sample period to the data period. The identified samples may be used to reconstruct the original waveform with fewer samples than the over-sampled waveform.

Fractional-decimation signal processing

A decimation system and decimation circuit for decimating waveform data on an oscilloscope. The decimation circuit is implemented using sixteen parallel 16-to-1 multiplexers connected in parallel to a data bus which selectively captures samples based on control signals generated by a sample counting circuit. Decimation factor and phase values can be input to program the amount of decimation performed by the circuit. The decimation system provides even more flexibility in controlling the decimation and is formed by combining several of the decimation circuits with corresponding analog-to-digital converters and memory segments.

Parallel decimation circuits

A Vernier delay line interpolator provides a precision level smaller than a clock period by delaying a periodic pulse signal in a delay line which has equally time-spaced taps and a total delay that is a harmonic H greater than 1 of the pulse period. The taps of the delay line are latched and decoded to derive the fraction of the pulse period that has passed. When the interpolator is combined with a coarse counter, misalignment between their outputs is prevented by having the coarse counter count both edges of the periodic pulse signal so as to provide redundant bits between the counter and the interpolator. If the redundant bits are not equal, the counter output is corrected before it is combined with the output of the interpolator.

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Franklin Lakes, NJ, United States of America

Mark S Gorbics