Applied Micro Circuits Corporation

Global Technology Associates, LLC

Mark Roger Patterson

Siamak Fazelpour

Sandip Sandhu

Michel Fleury

Behrouz Heshmatipour

Vincent Carl Star

A method of homogenizing expected data-harvest yields, the method comprising: selecting a population of data-sources; selecting a quantity of data as a data-harvest maximum, H; and dividing the population into a set of groups according to the data-harvest maximum Hsuch that: each group includes at least one data-source; and each group generates an expected data-harvest yield, H, that is less than or equal to the data-harvest maximum H, H&#x2266;H.

Method of and apparatus for homogenizing expected data-harvest yields

An interconnect via structure according to the present invention can be used to support high frequency broadband signal transmission. The interconnect vias progressively increase in size and pitch from the signal source layer of the package substrate to the terminal pad layer of the package substrate. Each interconnect via includes a plurality of conductive sections formed at different substrate layers. At each substrate layer, the size and pitch of the vias result in a specified impedance. In a practical embodiment, the via impedance at each substrate layer is constant (e.g., 50 ohms). The interconnect structure can maintain a constant impedance while transitioning from a relatively narrow pitch at the signal source layer to a relatively wide pitch at the terminal layer, which may correspond to the pitch of the package substrate solder balls.

Fanned out interconnect via structure for electronic package substrates

An electronic package, such as a ball grid array (&ldquo;BGA&rdquo;) package, includes a high speed signal trace formed at a conductive layer and a corresponding reference plane formed at another conductive layer. The reference plane includes a cutout region formed therein; the cutout region is positioned over the signal solder ball to which the high speed signal trace is coupled. The lateral center point of the cutout region is offset relative to the lateral center point of the signal solder ball. The offset configuration reduces the capacitance between the signal solder ball and the reference plane and improves the high frequency transmission characteristics of the electronic package.

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San Diego, CA, United States of America

Mark Roger Patterson