Agilent Technologies, Inc.

Hewlett-packard Company

Keysight Technologies, Inc.

Mark Joseph Woodward

Marlin E Viss

Willard S MacDonald

Stephen W Hinch

A controller includes a memory, a processor, and a first interface to a clock recovery unit that provides a recovered clock. When executed by the processor, instructions from the memory cause the controller to: instruct, via the first interface, the clock recovery unit at a first loop bandwidth to provide the recovered clock to a signal sampler; instruct, via the first interface, the clock recovery unit at a second loop bandwidth wider than the first loop bandwidth, to provide the recovered clock to the signal sampler; compare measurements from the signal sampler at the first loop bandwidth to measurements from the signal sampler at the second loop bandwidth; and instruct, via the first interface, the clock recovery unit at a third loop bandwidth to provide the recovered clock to the signal sampler applying adjustments based on comparing the measurements.

Clock recovery unit adjustment

A direct determination equalizer system ('DDES') for compensating for the deterministic effects of a transmission channel and a data source is disclosed. The DDES may include an equalizer having equalizer-tap coefficients, a cross-correlator configured to receive the first sampled signal and an ideal signal and in response produce a cross-correlated signal, and a processor in signal communication with the equalizer and the cross-correlator. The equalizer is configured to receive a first sampled signal and in response produce an equalized output data signal sequence and the processor is configured to determine the equalizer-tap coefficients from the cross-correlated signal.

Direct determination equalizer system

A signal sampling system includes an input signal and a plurality of samplers. The plurality of samplers produces a plurality of sample output signals. Each sampler from the plurality of samplers samples the input signal to produce a corresponding sample output signal from the plurality of sample output signals. Each sampler samples the input signal with a sampling pulse having a sampling aperture. A first sampling aperture used by a first sampler from the plurality of samplers to sample the input signal differs in duration from a second sampling aperture used by a second sampler from the plurality of samplers to sample the input signal.

Sampling system using sampling apertures of different durations

An internally triggered equivalent-time sampling system characterizes high-speed data signals having a predetermined nominal data rate by using an internal oscillator that runs independent of a synchronous trigger signal. The sampling system acquires samples of the data signal at a strobe rate, set by the oscillator, which is lower than the nominal data rate of the data signal. The samples, the strobe rate, and the nominal data rate are communicated to a quality optimizer which compensates for static rate deviations between the nominal data rate and the actual data rate of the data signal to establish timing correspondence between the acquired samples. The timing correspondence establishes the time placement of the acquired samples when characterizing the data signal on a display or other output device. When the oscillator has high timing stability relative to the data signal, jitter and other attributes of the data signal are accurately characterized.

Internally triggered equivalent-time sampling system for signals having a predetermined data rate

A sampling timebase system uses the frequency stable clock signal present in digital systems to accurately reconstruct waveforms that are synchronous with the clock signal. The sampling timebase system provides a strobe signal having a precisely controlled time delay relative to a trigger event. An interval counter is programmed to count a specified number of the cycles of the clock signal, providing for coarse time delay adjustment of the strobe signal in time increments determined by the period of the clock signal. A fine delay generator triggered by the terminal count of the interval counter provides for fine adjustment of the time delay of the strobe signal. The interval counter and fine delay generator are programmable to progressively vary the time delay between the strobe signal and the trigger event relative to cycles of the waveform. The strobe signals, when applied to a sampler, enable sufficient samples to be acquired to reconstruct selected segments of the waveform. An optional prescaler included in the sampling timebase system divides the frequency of the applied clock signal when the clock signal is beyond the operating frequency of the interval counter or the fine delay generator.

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Santa Rosa, CA, United States of America

Mark Joseph Woodward