Intel Corporation

Other

Microchip Technology Inc.

Ol Security Limited Liability Company

Aegis Technologies, Inc.

Mark J Palmer

James D Logan

Charles G Call

Steven Schlanger

Elissa E Carapella

Mostafa A Aghazadeh

Siva Natarajan

Udy A Shrivastava

William M Siu

A communications system for simulcasting audio or audiovisual program content to a plurality of participating system users via a communication network. Each user operates an access device that reproduces the received program content for the user and also accepts spoken comments from the user concurrently with or immediately following the reproduction of the program content. The spoken comments are transmitted to at least selected ones of the other users so that the selected users can engage in a conversation about the program content as it is simulcast.

Methods and apparatus for creating, combining, distributing and reproducing program content for groups of participating users

The present invention relates generally to functional pathway configurations at the interfaces between integrated circuits (ICs) and the circuit assemblies with which the ICs communicate. More particularly, the present invention relates generally to the functional pathway configuration at the interface between a semiconductor device (e.g., computer chips like microcontrollers, microprocessors, application specific integrated circuits (ASIC), programmable gate arrays (PGA) and other devices and/or combinations thereof) and the circuitry of a system including the chip. Even more particularly, the present invention relates to a 14-pin microcontroller functional pathway configuration for the interface between the microcontroller and a system in which the microcontroller is embedded to support infrared communications.

Functional pathway configuration at a system/IC interface

Methods of assembling an electronic package including forming a housing with a first bond pad on a top surface of a bond shelf, forming a conductive strip along a side surface or edge of the bond shelf, and removing a portion of the conductive strip to form a pair of separate conductive strips. The conductive strip may be formed by plating a conductive material onto the bond shelf into unmasked areas thereof. The conductive strip may include a portion that extends around from the side surface to the top surface of the bond shelf to form a bond pad or couple to a bond pad on the top surface. The extended portion may also anchor the conductive strip and the separate conductive strips to the housing and reduce the likelihood of delamination during removal of the portion of the conductive strip to form the separate conductive strips.

Methods forming an integrated circuit package with a split cavity wall

A communications controller may be programmed to store an identification code (identification data string) for a produce device in a non-volatile read/write memory, e.g., an electrically erasable programmable read only memory (EEPROM), FLASH memory, etc. The identification string may be generic or unique for the device and may be programmed before, during or after manufacture of the device. In addition, the identification string may be reprogrammed whenever a change is made to the device, e.g., after an upgrade.

Programmable identification in a communications controller

An electronic package that may include a first bond pad and a second bond pad located on a bond shelf. The bond shelf may have an edge. The package may have a first conductive bus that may be connected to the first bond pad by a first conductive strip that extends along the edge of the bond shelf. The package may also have a second conductive bus that may be connected to the second bond pad by a second conductive strip that extends along the edge of the bond shelf.

Split cavity wall plating for an integrated circuit package

A multi-chip module which contains a heat spreader that maintains a relatively uniform temperature profile between the devices of the module. The module includes a first electronic device and a second electronic device that are both mounted to a package. The devices are electrically connected by routing within the package. A heat spreader that is thermally coupled to both devices. The heat spreader transfers the heat generated by the electronic devices so that the devices operate at approximately the same temperature. A heat slug may be attached to the heat spreader to reduce the thermal impedance of the module.

Integrated circuit package with a heat spreader coupled to a pair of

An integrated circuit package which has vias that provide the dual function of electrically grounding an integrated circuit and removing heat generated by the circuit. The package has a bonding shelf extending from a base portion. The bonding shelf has a plurality of bonding pads that are connected to corresponding pads on a top surface of the integrated circuit. The integrated circuit is mounted to the base portion of the package. The base portion has a plurality of surface pads that are connected to corresponding ground pads on the integrated circuit. Located between the base portion and an external bottom surface of the package is a ground bus. The package has a plurality of vias that electrically connect the surface pads and integrated circuit to the ground bus. The vias further extend to the external bottom surface to provide a thermal path between the integrated circuit and the outside of the package.

Integrated circuit package with a plurality of vias that are

A contact pattern for an integrated circuit package. The package has a plurality of contacts that are soldered to corresponding pads of a printed circuit board. The contacts are arranged into a plurality of cell units. Each cell unit has a row of center contacts diagonally located between two rows of outer contacts. The diagonally located pins increase the density of the contact pattern. Each unit cell is separated by a space that allows routing traces to be routed therethrough. Routing traces may also be routed through the unit cells to increase the routing density of the package. The package provides a contact pattern that optimizes both the pin density and the routing traces.

Integrated circuit package that has a plurality of staggered pins

An integrated circuit package that is coupled to a printed circuit board by a socket assembly. The socket assembly has a plurality of pins that are mounted to the circuit board. The pins are coupled to corresponding conductive sockets and outer rings of the socket assembly. The package contains an integrated circuit that is coupled to external pins which extend from a bottom surface of the package housing. The package also has a plurality of conductive rings that are located on the bottom surface of the housing and are electrically coupled to the integrated circuit. To install the package, the package pins are inserted into the individual sockets of the socket assembly. Insertion of the pins also presses the conductive rings of the package onto the corresponding outer rings of the socket. The conductive rings are typically dedicated to the power and ground pins of the system, wherein the integrated circuit receives power through the rings. The use of rings reduces the insertion force required to attach the package to the socket.

Standardized power and ground design for pin grid array packages

A converging design multi-chip module having semiconductor chips connected to a substrate recessed into a cavity of the MCM package body, the chips being interconnected using flip chip and control collapse chip connection, wherein a metal heatspreader plate is adapted to engage the backside of the chips and is held in place by an attachment ring welded to the package body. Alternatively, the heatspreader plate can be glued directly to the backside of the chips using a high thermal conductivity and low modulus cement. One or more electrically passive thermal shunt chips are disposed between the substrate and the heatspreader plate for additional heat conduction. In a preferred embodiment, the attachment ring is made from KOVAR.RTM. and has a thermal coefficient of expansion that is about the same as that of the package body. Thermal grease is interposed between the heatspreader plate and the semiconductor chips for improved heat transfer. In an alternative embodiment, the heatspreader plate is directly shunted to the substrate. In another alternative embodiment, the heatspreader plate is urged against the chips by a spring plate or a coiled spring against a lid for the package cavity.

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Phoenix, AZ, United States of America

Mark J Palmer