Cypress Semiconductor Corporation

Mark Healy

Andriy Maharyta

Oleksandr Karpin

Paul M Walsh

Daniel O'Keeffe

Mykhaylo Krekhovetskyy

An integrated circuit includes a capacitive sensing circuit to receive signal values associated with a proximity distance to an object. A pair of low pass filters (LPFs) are coupled in parallel to the capacitive sensing circuit and include a first LPF configured with a low filtering rate and a second LPF configured with high filtering rate that is higher than that of the low filtering rate. Control logic is coupled to the pair of LPFs and estimates the proximity distance based on one or more filtered signal values received from the pair of LPFs. The logic causes the second LPF to filter the signal values while the proximity distance remains unchanged. The logic detects a change in the proximity distance beyond a threshold value. The logic causes the first LPF to filter a subsequent signal value received from the capacitive sensing circuit based on detecting the change.

Precise proximity object detection for capacitive sensing

A device can include analog circuits formed with a substrate, including a comparator, analog switches, and a balance current circuit. A sensor current and balance current can be applied at an input of the comparator. The sensor current, balance current or both can be modulated with a switch control signal. Digital circuits can include switch control logic that generates the switch control signal in response to an output of the comparator and a modulation clock signal. Digital signal processing circuits can generate a multi-bit digital value from a bit stream output by the comparator circuit. The multi-bit digital value can be an analog-to-digital conversion of the sensor current. Corresponding methods and systems are also disclosed.

Current-mode analog-to-digital converter systems, devices and methods for multi-sensing

Apparatuses and methods of capacitance-to-digital code conversion are described. One capacitance-to-digital converter (CDC) includes front-end circuitry, including a comparator. The CDC further includes a first capacitive digital-to-analog converter (CDAC) coupled to a first input of the comparator and, in a first phase, to a sensor cell. The CDC further includes a second CDAC coupled to a second input of the comparator and, in a second phase, to the sensor cell. The front-end circuitry provides a digital output. The digital output is proportional to a sensor capacitance of the sensor cell.

Nano-power architecture enhancements

Apparatuses and methods of shielding for capacitance-to-digital code conversion are described. One apparatus includes a capacitance-to-digital converter (CDC) for measuring a self-capacitance of a sensor electrode. The capacitance-to-digital code converter can in a first phase, apply a supply voltage to the sensor electrode. The sensor electrode and a shield electrode, the form a mutual capacitance with the sensor electrode. The CDC, in a second phase, couples the shield electrode to a ground potential and the sensor electrode to a first modulation capacitor. The first modulation capacitor is pre-charged to a reference voltage. The CDC, in a third phase, couples the sensor electrode and the shield electrode to the ground potential. The CDC, in a fourth phase, couples the shield electrode to the ground potential and the sensor electrode to a second modulation capacitor. The second modulation capacitor is pre-charged to the reference voltage.

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County Cork, Ireland

Mark Healy