Wideband Semiconductors, Inc.

Wideband Semiconductor, Inc.

Mark Fong

David Bruce Isaksen

Byron Esten Danzer

James P Flynn

Richard John Fagerlund

A method for digital clock smoothing is provided. The method comprises: (A) inputting an asynchronous data stream having an asynchronous symbol rate into a FIFO two-port memory block; (B) obtaining FIFO depth B by subtracting modulo B for each stored symbol a symbol output address from a symbol input address; (C) inputting FIFO depth B into a programmable look-up table (LUT); (D) obtaining a phase detector error signal; (E) scaling the phase detector error signal to obtain a scaled error factor; (F) adding the scaled error factor to a nominal phase step to obtain a phase update; (G) obtaining a smoothed symbol rate; and (H) reading out each output symbol from FIFO under control of an output FIFO address control register at the smoothed symbol rate.

Digital clock smoothing

A method of automated acquisition of a QAM signal is provided. The method employs a State machine progressing from an initial State to a final State. The State machine comprises: a symbol timing recovery loop; a carrier loop; a coarse frequency loop; and an equalizer. The method comprises: (A) Performing an automatic gain control (AGC) operation on an incoming QAM signal; (B) Performing a symbol timing recovery of an input QAM signal by adjusting a sampling clock of the symbol timing recovery loop; (C) Performing a Blind Equalization of the QAM signal without carrier lock; (D) Performing a carrier recovery of the QAM signal; and (E) Performing a decision directed equalization (DDE) of the QAM signal by updating a set of coefficients of the equalizer by using a decision based algorithm.

Modes of operations in QAM modems using hysteresis sub-states

An apparatus for automated acquisition of a QAM signal. The apparatus employs a State machine progressing from an initial State to a final State. The State Machine comprises: (A) an AGC State further comprising a Minimum Sub-State further comprising: Coarse Estimate Sub-State; and an AGC Lock Sub-State further comprising Maximum Sub-State; (B) a Clock 1 State further comprising a Minimum Sub-State, and a Maximum Sub-State; (C) a Clock 2 State further comprising: a Minimum Sub-State; and a Maximum Sub-State; and (D) a Blind State further comprising a Minimum Sub-State; a Threshold Sub-State further comprising a Maximum Sub-State; and a Hysteresis Sub-State.

Control algorithm using hysteresis sub-states in QAM modems

A method for digital clock smoothing comprising: (A) inputting an asynchronous data stream having an asynchronous symbol rate into a two-port memory block; (B) accumulating a plurality of symbols of the asynchronous data stream in the two-port memory block for a predetermined time period; (C) computing an average symbol rate for the input asynchronous data stream; (D) generating a clock error signal equal to the difference between the average symbol rate of the input asynchronous data stream and a nominal output synchronous clock; (E) obtaining a smoothed symbol rate clock by using the error clock signal; and (F) generating an output smoothed data stream having the smoothed symbol rate clock.

Digital clock smoothing apparatus and method

The method of selecting an optimum mode of operation of the QAM modem comprising (A) using a host interface to select a pair of states, the first state being an initial state; the second state being an intermediate state; and (B) causing a state machine to progress from the initial state to a final state via the intermediate state to optimize the performance of the QAM modem.

Modes of operations in QAM modems

An apparatus for demodulating a digital input signal having a pre-assigned symbol rate by using a single sample clock signal is disclosed. The pre-assigned symbol rate is selected from the group consisting of a plurality of symbol rates. The apparatus comprises: a Cascaded Integrated Comb (CIC) Decimator filter configured to perform a filtering-decimation operation to isolate the down converted digital signal having the pre-assigned symbol rate; a Shaper configured to restore an original spectrum of the I and Q components of the CIC output signal; and a CIC tuner loop filter configured to insert the estimated by the Coarse Frequency estimation block frequency offset into a carrier loop in order to complete a carrier recovery of the pre-assigned input digital signal.

Frequency agile tuner and variable rate decimator for digital demodulator

An apparatus for modulating a digital input signal having a pre-assigned symbol rate and having a baseband carrier frequency by using a single sample clock signal. The pre-assigned symbol rate is selected from the group consisting of a plurality of symbol rates. The apparatus in a baseband mode comprises: (a) an Interpolate_by_2_Nyquist Filter block configured to double the pre-assigned symbol rate, to perform Nyquist filtering operation, and configured to output an Inphase (I) and a Quadrature (Q) components of the pre-assigned signal having the double symbol rate; (b) a Complex Shaper block configured to pre-compensate the spectrum of I and Q components of the signal having the double symbol rate in advance for a spectrum distortion caused by the apparatus; &#xa9;) a Cascaded Integrated Comb (CIC) Interpolator filter configured to increase by an interpolation R factor the sample rate of the signal as compared with a sample rate of the baseband carrier; (d) a Phase Shifter configured to compensate a phase of interpolated by R signal for a known quadrature error; (e) an Inphase (I) channel and Quadrature (Q) channel Gain blocks configured to pre-compensate the I and Q components of the interpolated by R signal for a known gain difference circuit between the I and Q channel gains; (f) an I and Q channel DC offset blocks configured to pre-compensate I and Q components of the interpolated by R signal for a known DC offset difference circuit between I and Q channel DC offset blocks; and (g) a Controller block configured to supply a plurality of control signals to the apparatus. In the passband mode, I and Q channel Gains are set to one, and I and Q channel DC offsets are set to zero.

CIC qam modulator

In a system comprising a subscriber (sub) carrier tracking loop and a hub carrier tracking loop, a method and apparatus for resolving phase equivocation. The method comprises the following steps: (A) acquiring a phase and a frequency of a hub carrier frequency by utilizing the sub carrier tracking loop; (B) estimating an instant absolute frequency offset between a received symbol point and a corresponding plant point; (C) averaging the instant absolute frequency offset over a plurality of received symbols; (D) storing the averaged estimated frequency offset in a frequency register of the sub carrier tracking loop; (E) locking the sub carrier tracking loop on the hub carrier frequency by compensating for the stored averaged estimated frequency offset; (F) estimating an instant absolute phase error between a received symbol point and a corresponding plant point; (G) averaging the instant absolute phase error over a plurality of received symbols; (H) resolving phase equivocation by adjusting the averaged absolute phase error, if the averaged absolute phase error is at least equal to a predetermined equivocation phase threshold; and (I) completing the tracking of the hub carrier frequency by the locked sub carrier tracking loop.

Minimization of phase equivocation in burst modems

A method of baseband/passband digital modulation for a data transmission system wherein a plurality of data symbols is transmitted over a transmission channel at a symbol rate. The method comprises the following steps: (1) generating a plurality of I and Q components of symbols by mapping an input bit stream comprising a plurality of digital codewords into a QAM constellation; (2) selecting a passband or a baseband mode; and (3) generating an analog output signal in the passband or baseband mode. The step of selecting the passband or the baseband mode depends on the complexity of QAM constellation. If QAM constellation includes less than 64 QAM plant points, the passband mode is selected, and if QAM constellation includes more than 64 QAM plant points, the baseband mode is selected. If the QAM constellation includes less than 64 QAM plant points, initially selecting the passband mode until a D/A conversion speed reaches a maximum passband conversion speed, and until an output symbol rate reaches a maximum passband symbol output rate, and subsequently switching to the baseband mode in order to double the maximum passband conversion speed and to double the maximum passband symbol output rate.

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San Jose, CA, United States of America

Mark Fong