International Business Machines Corporation

Other

Mark F Bregman

Ismail C Noyan

Michael J Palmer

Raymond R Horton

Ho-Ming Tong

Alphonso Philip Lanzetta

Timothy C Reiley

Mark B Ritter

Paul Andrew Moskowitz

Harry R Bickford

Caroline A Kovac

Peter G Ledermann

Paige A Poore

Alfred Viehbeck

Stephen L Buchwalter

Thomas Mario Cipolla

Sandeep Kishan Singhal

Mitchell S Cohen

Glen Walden Johnson

Ajei Sarat Gopal

Modest M Oprysko

Harold S Stone

Karl Hermann

Paul R Hoffman

Dennis L Rogers

Leonard T Olson

Roger Alan Pollak

David Peter Pagnani

Ekkehard F Miersch

Daniel Quinto Bandera

William D Brewer

Walter V Vilkelis

Jeanine M Trewhella

John Gow, Iii

Uh-Po E Tsou

Systems, methods and computer program products are provided for selecting an advertising object to be displayed within a Web page requested by a user based on the geographic location of the user and/or on the time of day. Systems, methods and computer program products are provided for validating an offer within an advertising object of a Web page displayed within a Web client in communication with a Web server. Systems, methods and computer program products are also provided for changing content within an object displayed within a Web page based on changes in geographic location of a user. In addition, systems, methods and computer program products are provided for redeeming an electronic coupon stored within a first computing device, wherein the electronic coupon is valid within a designated geographic region and for a designated period of time.

Systems, methods and computer program products for providing time and location specific advertising via the internet

Structure for mounting electronic devices thereon. The structure is fabricated from a plurality of substrates each having a thermally and/or electrically conductive core surrounded by a dielectric material. The substrates can be adherently placed together with the electrically conductive cores providing ground and power planes or the substrates can be mounted together with connectors electrically interconnecting adjacent substrates and spacing the adjacent substrates apart providing a space through which a fluid can flow to extract heat generated by the electronic devices mounted thereon. The conductive cores provide both power and ground planes to the structure and a means for thermally dissipating the generated heat.

Multi-level circuit card structure

A conductor attachment wherein each conductor is mounted on a dielectric tape and has an attachment portion that is supported by the tape to an adjacent location a uniform distance from the bonding location and that contacts on a level with the plane of the underside of the tape. One conductor supporting tape has portions of the tape that extend into a central contacting area opening to contact locations at contacting pads in rows remote from the edge. Another supporting tape has window openings at the contacting locations. The conductor ends are brought into the level of the underside of the tape by a manufacturing rolling operation between an elastomer surface roller and a solid backing roller.

Electronic substrate multiple location conductor attachment technology

A method for bonding conductors to semiconductor chip contact pads wherein each conductor is mounted on a dielectric tape and has an attachment portion that is supported by the tape to an adjacent location a uniform distance from the bonding location and that contacts on a level with the plane of the underside of the tape. One conductor supporting tape has portions of the tape that extend into a central contacting area opening to contact locations at contacting pads in rows remote from the edge. Another supporting tape has window openings at the contacting locations. The conductor ends are brought into the level of the underside of the tape by a manufacturing rolling operation between an elastomer surface roller and a solid backing roller.

Method for bonding dielectric mounted conductors to semiconductor chip

A system for testing chips uses a patterned tape having a patterned array of cantilevered contact leads. The tape serves as an interface between the chip under test and a testing unit by providing conductive leads from the I/O terminals on the chip to an off-chip measuring system. The leads on the array may have balls, tips or other shapes on the end to provide contact with the terminals and compensate for height differences. The tape is a single frame or has a series of arrays each positioned around an opening where the chip will be located when a particular pattern is positioned over that chip for test. The pattern on the tape may be the same array or a different array. The tape is indexed to a new pattern when the old one is damaged or no longer needed. Alignment with the chip is by optical sensing and physical pin movement. The tape may have a flap protruding into an aperture and deflectable to provide for planar contact of the leads to the device under test.

Integrated circuit testing system having a cantilevered contact lead

A direct optical connector (DOC) comprised of first and second members, each including a plurality of light emitting and light detecting locations, operative in combination with energy transfer media to form direct optical connections between the light emitting locations and the light detecting locations, wherein said first and second members are adapted for reclosable connection to each other whereupon the light emitting locations on one member are aligned with the light detecting locations on the other member. The first and second members of the preferred DOC are modular. Alternative forms of energy transfer media are used in various embodiments of the invention including lenslet arrays, imaging fiber plates (IFPs), and energy transfer fiber plates (ETFPs). These media have differing alignment criteria, differing degrees of immunity from crosstalk, differing degrees of transfer efficiency, different manufacturing costs, etc., thereby permitting the fabrication and/or use of a connector most suited to meet the requirements of a particular application. A modular half of a DOC can be used in conjunction with a remote optical connector (ROC) to channel light over relatively long distances. The invention also encompasses processes for fabricating ROCs.

Electro-optical connectors

An optical bus for interconnecting electronic devices. The bus has a substrate with through-holes therein. An optically conductive material is disposed on one side of the substrate. The material fills the through-holes and forms a layer of predetermined thickness on this side of the substrate. In the outer surface of this layer there are facets or angled regions. The surface and facets are optically reflective. Cards or modules are optically connected by means of optical connectors to the through-holes on the opposite side of the substrate. Light emitted by the connector travels to the associated faceted surface from which it reflects towards other faceted surfaces from which it is partially transmitted and partially reflected to another connector. The arrangement permits optical communication between a plurality of electronic devices.

Optical bus for computer systems

Electronic device packaging structures useful for electrically interconnecting an electronic device to a substrate. The structure contains at least two metallization layers with dielectric layers between adjacent to metallization layers. The dielectric layers can have variable thickness. Beam leads can project inwardly in cantilevered fashion over a central aperture through the dielectric layers. The inner ends of the beam leads lie substantially in one plane and can be bonded to contact pads on integrated circuit electronic devices. Beam leads can project outwardly from the metallization layers over outer edges of the dielectric layers for bonding to contact pads on a substrate. Signal leads on metallization layers can be symmetrically arranged between ground and voltage leads to provide optimal impedance properties. These structures are useful for tape automated bonding applications.

Multilevel integrated circuit packaging structures

A three dimensional chip package comprising a plurality of semiconductor substrates, each having at least one semiconductor electronic device mounted thereon; wherein at least a subset of said plurality substrates are physically joined to form an enclosure within which each substrate has at least one electrical contact location to another substrate; and further wherein at least one cooling channel is provided within said enclosure into which a cooling fluid may be introduced.

Three dimensional microelectric packaging

An integrated circuit device package in which integrated circuit devices are mounted with active faces placed facing each other to form a double-device structure. Input/output terminals on the active faces of each device can be electrically interconnected by placing an interconnection means between the chips to electrically interconnect input/output terminals on the active faces of the first and second device. Beam leads, each having an inner and outer lead bond site, project outwardly from between the devices where each of the inner lead bond site is solderlessly bonded between conducting patterns on each device bonded. A series of double-device structures can be formed on a tape having a plurality of sets of beam lead patterns thereon. Each beam lead of each set having an inner and outer lead bond site, projects outwardly from between the double-device structure, the inner lead bond site being solderlessly bonded between conducting patterns on each device.

Double electronic device structure having beam leads solderlessly bonded

Growing community of inventors

Ridgefield, CT, United States of America

Mark F Bregman