International Business Machines Corporation

Lenovo (singapore) Pte. Ltd.

Other

Mark Elliot Andresen

Wilson Velez

Luke David Remis

Andrew Boyce McNeill, Jr

Joaquin F Pacheco

Virginia Ott

David Eduardo Vieira

Pravin S Patel

Jay H Neer

Theodore Brian Vojnovich

Paul Daniel Kangas

Christopher Landon Wood

James Joseph Parsonese

Brian Ashley Carpenter

Patrick Leo Caporale

Robert J Christopher

Thomas H Newsom

Timothy Vincent Lee

Larry G Pymento

Menlo Wuu

Thomas A Kriz

Richard Christopher Fore

William T Byrne

Andrew S Potemski

Jack S Andresen

Richard J Nelson

Leslie M Garrett

William Roff Thomas

An apparatus for storing data based on physical accessibility of storage devices is disclosed. One embodiment of an apparatus includes a processor and a memory. The memory that stores code executable by the processor to acquire information related to physical accessibility for a plurality of data storage devices, each data storage device operably connected to a computing device. The code is further executable by the processor to classify the physical accessibility for each of the plurality of data storage devices based on the acquired information. Also, the code is executable by the processor to store data on a data storage device of the plurality of data storage devices based on the classified physical accessibility for the data storage device and sensitivity of the data. Further, data with a higher sensitivity is stored on a data storage device classified with a lower accessibility than data with a lower sensitivity.

Storing data based on the physical accessibility of data storage devices

Out-of-band management of data drives including receiving, from a user, a control command targeting a data drive communicatively coupled to a backplane, wherein the data drive is communicatively coupled to the computing device via an interconnect bus; generating, based on the control command, an out-of-band command targeting a baseboard management controller (BMC) communicatively coupled to the backplane, wherein the out-of-band command comprises a data drive location identifier; sending the out-of-band command to the BMC, wherein the BMC, in response, identifies the data drive on the backplane using the data drive location identifier and a cable topology table, and performs the out-of-band command on the data drive; and receiving, from the BMC, a first notification that the out-of-band command has been performed on the data drive identified by the data drive location identifier.

Out-of-band management of data drives

According to one embodiment, a computer program embodied on a tangible computer readable medium includes computer code for identifying a wireless communications gateway in communication with a management controller, computer code for establishing a wireless communications connection between one or more drives and the management controller, utilizing the wireless communications gateway, and computer code for communicating one or more of monitoring data and control data between the management controller and the one or more drives, utilizing the wireless communications connection.

Wireless communication between a management controller and one or more drives

An apparatus, system, method, and program product for verifying a communication bus connection to a peripheral device are disclosed. The apparatus includes a data module that receives, over a communication bus, an identifier for a location where a peripheral device is installed. The peripheral device is communicatively coupled to an information handling device using the communication bus. The apparatus includes a verification module that compares the identifier received over the communication bus to a predefined identifier associated with the communication bus. The apparatus includes a notification module that sends a notification in response to the identifier received over the communication bus not matching the predefined identifier associated with the communication bus.

Verifying a communication bus connection to a peripheral device

An apparatus, system, method, and program product for managing peripheral devices using a data protocol is presented. A connection module determines one or more communication bus cables that communicatively couple one or more peripheral devices to an information handling device. A data module reads a data packet associated with a peripheral device over each of the one or more communication bus cables. Each data packet includes an identifier for a location where the peripheral device is installed. A topology module determines a cable connection configuration for the one or more communication bus cables and the one or more peripheral devices based on the installation location identifier received from each of the data packets associated with the one or more peripheral devices.

Data protocol for managing peripheral devices

An apparatus, system, method, and program product are disclosed for associating data buses and management buses for peripheral devices. A command module sends a command to a peripheral device to trigger activity on the peripheral device. The peripheral device is communicatively coupled to an information handling device using a separate data bus and a management bus connection of a management bus. The command is sent over the data bus to the peripheral device. A monitor module checks the management bus of the information handling device to determine which management bus connection is connected to the peripheral device that was active in response to the sent command. An association module associates the determined management bus connection with the data bus on which the command was sent and with the peripheral device.

Associating data buses and management bus connections for peripheral devices

An apparatus for reconfiguring a computing device includes an inventory module, a thermal analysis module, and a reconfiguration module. The inventory module detects one or more locations for one or more non-volatile memory express ('NVMe') devices. The one or more NVMe devices are coupled to a plurality of slots such that at least one of the slots is empty. The one or more NVMe devices thermally affect one or more further components of a computing device. The thermal analysis module determines one or more thermal characteristics for a current configuration and for one or more possible reconfigurations. The current configuration includes locations of the one or more NVMe devices and the one or more further components. The reconfiguration module selects a reconfiguration from the one or more possible reconfigurations based on the one or more determined thermal characteristics.

Reconfiguration of computing device and/or non-volatile memory devices based on thermal analysis

A printed circuit board having one or more holes that are controllably drilled to extend into the printed circuit board substrate to a predetermined depth intermediate first and second faces. A mechanical locating pin is received into each of the one or more holes to mechanically align a first component for electronically interfacing with the printed circuit board substrate. A second component is installed on the second face directly opposite of the one or more holes such that the second component is in electronic communication with conductive traces or interconnects formed on the second face directly opposite of the hole.

Printed circuit board having a non-plated hole with limited drill depth

A modified 0402 footprint for a PCB, including: at least two padstacks each having a minimum area consistent with the 0402 standard; and each padstack modified on at least two corners such that the padstack's footprint can be placed beneath a ball grid array ('BGA'), the BGA having approximately a 1 millimeter pitch, and such that the padstack may be placed at least at a minimum distance away from a closest via in the PCB, wherein each padstack has a trace to a via not directly under a padstack in the PCB and each padstack has no via within the padstack.

Modified 0402 footprint for a printed circuit board ('PCB')

Reducing current draw of solid state drives from a shared power supply of a computer at computer startup, each SSD including computer memory, a capacitor, a disk controller, and a charge controller, the disk controller configured to enable the charge controller to charge the capacitor upon receiving a charge command, the SSDs organized into startup groups characterized by a position in a predefined startup order. Upon startup of the computer, beginning with a first startup group in the predefined startup order and until the last startup group in the predefined startup order has received a charge command, embodiments include, sending, by a storage device initiator, a charge command to a startup group to initiate charging of the capacitor of each solid state drive in the startup group and waiting a predefined period of time before sending another charge command to a next startup group in the predefined startup order.

Reducing current draw of a plurality of solid state drives at computer startup

A printed circuit board and method of making a print circuit board having one or more holes that are controllably drilled to extend into the printed circuit board substrate to a predetermined depth intermediate first and second faces. A mechanical locating pin is received into each of the one or more holes to mechanically align a first component for electronically interfacing with the printed circuit board substrate. A second component is installed on the second face directly opposite of the one or more holes such that the second component is in electronic communication with conductive traces or interconnects formed on the second face directly opposite of the hole.

Method of connecting components to a printed circuit board

A bi-directional voltage translator is disclosed. The bi-directional voltage translator includes a step-up voltage translator for converting signals of a first voltage level to signals of a second voltage level, and a step-down voltage translator for converting signals of the second voltage level to signals of the first voltage level. The step-up voltage translator includes a first source sense circuit, a first block feedback circuit and a first output driver circuit. The step-down voltage translator includes a second source sense circuit, a second block feedback circuit and a second output driver circuit.

Bi-directional voltage translator

The peripheral bus connector for improved aggregation of resources of a device on the peripheral bus includes a plurality of aggregation pins, in addition to the pins according to the peripheral bus standard. Signals from a controller on an extended peripheral bus adapter sends and receives signals in addition to standard signals of the peripheral bus through the aggregation pins. The aggregated device is hidden from third parties, and its existence is known only to the controller on the extended peripheral bus adapter. In this manner, resources are aggregated across a peripheral bus without needing the addition of another controller and without the need to redefine standard peripheral bus signals. In addition, standard peripheral bus adapters may still be used in the connector if resource aggregation is not desired.

Connector that enables aggregation of independent system resources across PCI/PCI-X bus and interlocked method for aggregating independent system resources across PCI/PCI-X bus

A method and system for automatically providing termination to a SCSI I/O bus within a data processing system is disclosed. An inline terminator is provided for use within a data processing system. The inline terminator provides a connection between a first controller and an I/O bus utilizing a plurality of connection pins including a device removal detection pin. The inline terminator includes a terminator circuit and a control circuit coupled to the device removal detection pin to detect whether the controller and bus are connected. In one embodiment, the detection pin is a short ground pin on the SCSI bus that is not associated with a signal or differential signal pair. The terminator circuit is activated when the controller and bus are disconnected and deactivated otherwise to automatically terminate the I/O bus.

Growing community of inventors

Cary, NC, United States of America

Mark Elliot Andresen