International Business Machines Corporation

Mark E Jost

Ronald N Schulz

Abbas Behfar-Rad

Louis L Hsu

Seiki Ogura

David Louis Harame

Gary Bela Bronner

Ranee W Kwong

Christoph S Harder

Taqi Nasser Buti

Peter P Kwan

A semiconductor ridge waveguide laser structure with a roughened sidewall ridge that includes a substrate and an active layer disposed between lower and upper cladding layers. The structure further includes a waveguide ridge which comprises a contact layer and a trapezoidal ridge portion 16 of the upper cladding layer. The trapezoidal ridge portion has roughened sidewalls which provides low contact resistance.

Roughened sidewall ridge for high power fundamental mode semiconductor

What is disclosed is a semiconductor ridge waveguide laser structure having mechanical protection of ridge element by means of a thick, multi-layer organic material. The organic material, which may be a polyimide film, is deposited over the ridge element. The present invention also provides a fabrication process for depositing the protective means on the ridge element including deposition and photolithographic steps.

Protection means for ridge waveguide laser structures using thick

A SOI BiCMOS integrated circuit has CMOS devices formed in a thin epitaxial layer of 1,000 .ANG. and bipolar devices formed in a thick epitaxial layer of 1 .mu.m, the two thicknesses being formed by a process in which a set of oxide islands are formed on a first wafer; an epitaxial layer is grown from bipolar silicon regions up and over the islands in a step that forms the bottom portion of the bipolar regions; the first wafer is inverted and oxide-bonded to a second wafer with the newly grown epitaxial layer below the islands so that the new top surface has a high quality epitaxial layer; excess silicon is removed from the new surface and the surface is polished to a thickness of 1,000 .ANG. over the islands by use of a nitride polish stop layer, leaving a thick layer of epitaxial silicon of 1 .mu.m in the bipolar regions and a 1,000 .ANG. thick layer of epitaxial silicon in the CMOS regions.

Method of forming a BiCMOS SOI wafer having thin and thick SOI regions

The present invention is a self-aligned, vertical bipolar transistor structure and a method of manufacturing such a structure. Reducing lateral dimensions with optical lithography is difficult and not much is gained without concurrently reducing alignment tolerances. For bipolar transistors the alignment tolerance is particularly important since it determines the parasitic capacitances and resistances and thus directly affects speed. In this application a new fully self-aligned transistor structure is presented that self-aligns the shallow trench, extrinsic base contact, and the emitter polysilicon to the intrinsic device area. The structure has no critical alignments. To insure extrinsic-intrinsic base linkup the intrinsic base is put in early in the process, conserved during the stack etch, and patterned underneath the sidewall during the silicon mesa etch. Unlike other mesa-like transistor structures, no out-diffusion of the extrinsic-base is required and therefore low-temperature processing can be used to maintain a narrow vertical profile.

High performance vertical bipolar transistor structure via self-aligning

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Fishkill, NY, United States of America

Mark E Jost