Texas Instruments Corporation

Mark E Gibson

Louis N Hutter

John P Erdeljac

Jeffrey P Smith

James D Goon

Arnold C Conway

Mary Ann Murphy

Shiu-Hang Yan

AnhKim Duong

Susan S Kearney

An integrated circuit having PMOS, NMOS and NPN transistors is described for applications in which both digital and analog circuits are required. The integrated circuit is designed to allow standard CMOS cells to be used in the integrated circuit without redesign. A P+ substrate (48) is provided upon which a first P- epitaxy layer (46) is formed. N+ DUF regions (50,52) are provided for the PMOS and NPN transistors, respectively. The base region (68) is formed in an Nwell (58) by implantation and diffusion. Before diffusion, a nitride layer (70) is formed over the base (68) to provided an inert annealing thereof. The base diffusion and collector diffusion occurs before the CMOS channel stop and source/drain diffusions in order to prevent altering diffusion times for the MOS transistors.

High voltage merged bipolar/CMOS technology

Growing community of inventors

Mesquite, TX, United States of America

Mark E Gibson